Research output per year
Research output per year
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Dive into the research topics where Eugene George Walters, III is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Research output
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A program to improve manufacturing learning using simulation and automation
Aqlan, F., Dunsworth, Q., Ford, M. R., George Walters, E. & Resig, J., Jun 15 2019, In: ASEE Annual Conference and Exposition, Conference Proceedings.Research output: Contribution to journal › Conference article › peer-review
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Enhancing ergonomic design skills among undergraduate students by integrating Computer Aided Design and Digital Human Modeling
Aqlan, F., Huang, Y. H. R., Walters, E. G. & Al Meanazel, O. T., Jun 24 2017, In: ASEE Annual Conference and Exposition, Conference Proceedings. 2017-JuneResearch output: Contribution to journal › Conference article › peer-review
1 Scopus citations -
Reduced-area constant-coefficient and multiple-constant multipliers for Xilinx FPGAS with 6-input LUTs
George Walters, E., Dec 2017, In: Electronics (Switzerland). 6, 4, 101.Research output: Contribution to journal › Article › peer-review
4 Scopus citations -
Teaching Lean principles through simulation games
Aqlan, F. & Walters, E. G., Jun 24 2017, In: ASEE Annual Conference and Exposition, Conference Proceedings. 2017-JuneResearch output: Contribution to journal › Conference article › peer-review
5 Scopus citations -
24-bit significand multiplier for FPGA floating-point multiplication
Walters, E. G., Feb 26 2016, Conference Record of the 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015. Matthews, M. B. (ed.). IEEE Computer Society, p. 717-721 5 p. 7421227. (Conference Record - Asilomar Conference on Signals, Systems and Computers; vol. 2016-February).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
4 Scopus citations