Projects per year
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SHF: Medium: A Technology-Architecture-Algorithm Co-Design Exploration of Scalable Spiking Neural Networks (SNNs)
Das, C., Sengupta, A. & Narayanan, V.
6/1/20 → 5/31/23
Project: Research project
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SPX: SOPHIA: Support for Opportunistic Parallelism with Heterogeneous Intermittently-powered Accelerators
Sampson, J. M., Narayanan, V. & Kandemir, M.
10/1/18 → 9/30/23
Project: Research project
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Collaborative Research: Visual Cortex on Silicon
Narayanan, V., Carroll, J., Das, C., Rosson, M. B. & Giles, C. L.
10/1/13 → 9/30/21
Project: Research project
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II-NEW: INSpiRE: Infrastructure for heterogeNeous System ResEarch
Das, C., Sivasubramaniam, A., Narayanan, V., Kandemir, M. & Kifer, D.
10/1/12 → 9/30/15
Project: Research project
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SHF: Large:Collaborative Research: Architecting the Next Generation Memory Hierarchy - A Holistic Approach
Das, C., Sivasubramaniam, A., Narayanan, V., Kandemir, M. & Xie, Y.
8/1/12 → 7/31/17
Project: Research project
Research output
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Communication-Efficient k-Means for Edge-Based Machine Learning
Lu, H., He, T., Wang, S., Liu, C., Mahdavi, M., Narayanan, V., Chan, K. S. & Pasteris, S., Oct 1 2022, In: IEEE Transactions on Parallel and Distributed Systems. 33, 10, p. 2509-2523 15 p.Research output: Contribution to journal › Article › peer-review
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Hardware functional obfuscation with ferroelectric active interconnects
Yu, T., Xu, Y., Deng, S., Zhao, Z., Jao, N., Kim, Y. S., Duenkel, S., Beyer, S., Ni, K., George, S. & Narayanan, V., Dec 2022, In: Nature communications. 13, 1, 2235.Research output: Contribution to journal › Article › peer-review
Open Access -
CAPE: A Content-Addressable Processing Engine
Caminal, H., Yang, K., Srinivasa, S., Ramanathan, A. K., Al-Hawaj, K., Wu, T., Narayanan, V., Batten, C. & Martinez, J. F., Feb 2021, Proceeding - 27th IEEE International Symposium on High Performance Computer Architecture, HPCA 2021. IEEE Computer Society, p. 557-569 13 p. 9407239. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2021-February).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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CiM3D: Comparator-in-memory designs using monolithic 3-D technology for accelerating data-intensive applications
Ramanathan, A. K., Rangachar, S. S., Govindarajan, H. T., Hung, J. M., Lee, C. Y., Xue, C. X., Huang, S. P., Hsueh, F. K., Shen, C. H., Shieh, J. M., Yeh, W. K., Ho, M. S., Sampson, J., Chang, M. F. & Narayanan, V., Jun 2021, In: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 7, 1, p. 79-87 9 p.Research output: Contribution to journal › Article › peer-review
Open Access1 Scopus citations -
Crossbar based Processing in Memory Accelerator Architecture for Graph Convolutional Networks
Challapalle, N., Swaminathan, K., Chandramoorthy, N. & Narayanan, V., 2021, 2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2021-November).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution