15-nm channel length MoS2 FETs with single- and double-gate structures

A. Nourbakhsh; A. Zubair; Shengxi Huang; X. Ling; M. S. Dresselhaus; J. Kong; S. De Gendt; T. Palacios

doi:10.1109/VLSIT.2015.7223690

15-nm channel length MoS₂ FETs with single- and double-gate structures

A. Nourbakhsh, A. Zubair, Shengxi Huang, X. Ling, M. S. Dresselhaus, J. Kong, S. De Gendt, T. Palacios

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

29 Scopus citations

Abstract

We demonstrate single- and double-gated (SG & DG) field effect transistors (FETs) with a record source-drain length (L_S/D) of 15 nm built on monolayer (t_ch∼0.7 nm) and 4-layer (t_ch∼3 nm) MoS₂ channels using monolayer graphene as the Source/Drain contacts. The best devices, corresponding to DG 4-layer MoS₂-FETs with L_S/D=15 nm, had an I_on/I_off in excess of 10⁶ and a minimum subthreshold swing (SS_min.) of 90 mV/dec. at V_DS=0.5 V. At L_S/D=1 μm and V_DS=0.5 V, SS_min.=66 mV/dec., which is the best SS reported in MoS₂ FETs, indicating the high quality of the interface and the enhanced channel electrostatics.

Original language	English (US)
Title of host publication	2015 Symposium on VLSI Technology, VLSI Technology 2015 - Digest of Technical Papers
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	T28-T29
Volume	2015-August
ISBN (Electronic)	9784863485013
DOIs	https://doi.org/10.1109/VLSIT.2015.7223690
State	Published - Aug 25 2015
Event	Symposium on VLSI Technology, VLSI Technology 2015 - Kyoto, Japan Duration: Jun 16 2015 → Jun 18 2015

Other

Other	Symposium on VLSI Technology, VLSI Technology 2015
Country/Territory	Japan
City	Kyoto
Period	6/16/15 → 6/18/15

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/VLSIT.2015.7223690

Cite this

Nourbakhsh, A., Zubair, A., Huang, S., Ling, X., Dresselhaus, M. S., Kong, J., De Gendt, S., & Palacios, T. (2015). 15-nm channel length MoS₂ FETs with single- and double-gate structures. In 2015 Symposium on VLSI Technology, VLSI Technology 2015 - Digest of Technical Papers (Vol. 2015-August, pp. T28-T29). [7223690] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIT.2015.7223690

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title = "15-nm channel length MoS2 FETs with single- and double-gate structures",

abstract = "We demonstrate single- and double-gated (SG & DG) field effect transistors (FETs) with a record source-drain length (LS/D) of 15 nm built on monolayer (tch∼0.7 nm) and 4-layer (tch∼3 nm) MoS2 channels using monolayer graphene as the Source/Drain contacts. The best devices, corresponding to DG 4-layer MoS2-FETs with LS/D=15 nm, had an Ion/Ioff in excess of 106 and a minimum subthreshold swing (SSmin.) of 90 mV/dec. at VDS=0.5 V. At LS/D=1 μm and VDS=0.5 V, SSmin.=66 mV/dec., which is the best SS reported in MoS2 FETs, indicating the high quality of the interface and the enhanced channel electrostatics.",

author = "A. Nourbakhsh and A. Zubair and Shengxi Huang and X. Ling and Dresselhaus, {M. S.} and J. Kong and {De Gendt}, S. and T. Palacios",

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booktitle = "2015 Symposium on VLSI Technology, VLSI Technology 2015 - Digest of Technical Papers",

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Nourbakhsh, A, Zubair, A, Huang, S, Ling, X, Dresselhaus, MS, Kong, J, De Gendt, S & Palacios, T 2015, 15-nm channel length MoS₂ FETs with single- and double-gate structures. in 2015 Symposium on VLSI Technology, VLSI Technology 2015 - Digest of Technical Papers. vol. 2015-August, 7223690, Institute of Electrical and Electronics Engineers Inc., pp. T28-T29, Symposium on VLSI Technology, VLSI Technology 2015, Kyoto, Japan, 6/16/15. https://doi.org/10.1109/VLSIT.2015.7223690

15-nm channel length MoS₂ FETs with single- and double-gate structures. / Nourbakhsh, A.; Zubair, A.; Huang, Shengxi et al.
2015 Symposium on VLSI Technology, VLSI Technology 2015 - Digest of Technical Papers. Vol. 2015-August Institute of Electrical and Electronics Engineers Inc., 2015. p. T28-T29 7223690.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - 15-nm channel length MoS2 FETs with single- and double-gate structures

AU - Nourbakhsh, A.

AU - Zubair, A.

AU - Huang, Shengxi

AU - Ling, X.

AU - Dresselhaus, M. S.

AU - Kong, J.

AU - De Gendt, S.

AU - Palacios, T.

PY - 2015/8/25

Y1 - 2015/8/25

N2 - We demonstrate single- and double-gated (SG & DG) field effect transistors (FETs) with a record source-drain length (LS/D) of 15 nm built on monolayer (tch∼0.7 nm) and 4-layer (tch∼3 nm) MoS2 channels using monolayer graphene as the Source/Drain contacts. The best devices, corresponding to DG 4-layer MoS2-FETs with LS/D=15 nm, had an Ion/Ioff in excess of 106 and a minimum subthreshold swing (SSmin.) of 90 mV/dec. at VDS=0.5 V. At LS/D=1 μm and VDS=0.5 V, SSmin.=66 mV/dec., which is the best SS reported in MoS2 FETs, indicating the high quality of the interface and the enhanced channel electrostatics.

AB - We demonstrate single- and double-gated (SG & DG) field effect transistors (FETs) with a record source-drain length (LS/D) of 15 nm built on monolayer (tch∼0.7 nm) and 4-layer (tch∼3 nm) MoS2 channels using monolayer graphene as the Source/Drain contacts. The best devices, corresponding to DG 4-layer MoS2-FETs with LS/D=15 nm, had an Ion/Ioff in excess of 106 and a minimum subthreshold swing (SSmin.) of 90 mV/dec. at VDS=0.5 V. At LS/D=1 μm and VDS=0.5 V, SSmin.=66 mV/dec., which is the best SS reported in MoS2 FETs, indicating the high quality of the interface and the enhanced channel electrostatics.

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BT - 2015 Symposium on VLSI Technology, VLSI Technology 2015 - Digest of Technical Papers

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