2-D discrete cosine transforms on a fine grain array processor

Heung Nam Kim, Manjit Borah, Robert Michael Owens, Mary Jane Irwin

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Abstract

The 2-D DCT has been an industry standard in image data compression. Since its first introduction, a number of fast algorithms and technique have been introduced. Most of them were implemented using specialized VLSI chips. In this paper we present an efficient systolic 2-D DCT algorithm on a 2-D mesh fine-grained array processor. Our algorithm reads non-skewed input subimages and generates the output in non-skewed form with only a small amount of extra processors. It uses the minimum number of multiplications by employing modified small n algorithms. Our implementation of the 2-D DCT on the Micro Grained Array Processor (MGAP), which is a fine-grained and mesh-connected array processor being developed at the Penn State University, exploits massive parallelism. As a result the 2-D DCT of size 8×8 and 16×16 pixels for 256×256 pixel images can be computed at real time processing rates.

Original languageEnglish (US)
Pages356-367
Number of pages12
StatePublished - Dec 1 1994
EventProceedings of the 1994 IEEE International Workshop VLSI Signal Processing - La Jolla, CA, USA
Duration: Oct 26 1994Oct 28 1994

Other

OtherProceedings of the 1994 IEEE International Workshop VLSI Signal Processing
CityLa Jolla, CA, USA
Period10/26/9410/28/94

Fingerprint

Discrete cosine transforms
Parallel processing systems
Pixels
Data compression
Processing
Industry

All Science Journal Classification (ASJC) codes

  • Signal Processing

Cite this

Kim, H. N., Borah, M., Owens, R. M., & Irwin, M. J. (1994). 2-D discrete cosine transforms on a fine grain array processor. 356-367. Paper presented at Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing, La Jolla, CA, USA, .
Kim, Heung Nam ; Borah, Manjit ; Owens, Robert Michael ; Irwin, Mary Jane. / 2-D discrete cosine transforms on a fine grain array processor. Paper presented at Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing, La Jolla, CA, USA, .12 p.
@conference{433b90df863a441f9b28e780e1290dca,
title = "2-D discrete cosine transforms on a fine grain array processor",
abstract = "The 2-D DCT has been an industry standard in image data compression. Since its first introduction, a number of fast algorithms and technique have been introduced. Most of them were implemented using specialized VLSI chips. In this paper we present an efficient systolic 2-D DCT algorithm on a 2-D mesh fine-grained array processor. Our algorithm reads non-skewed input subimages and generates the output in non-skewed form with only a small amount of extra processors. It uses the minimum number of multiplications by employing modified small n algorithms. Our implementation of the 2-D DCT on the Micro Grained Array Processor (MGAP), which is a fine-grained and mesh-connected array processor being developed at the Penn State University, exploits massive parallelism. As a result the 2-D DCT of size 8×8 and 16×16 pixels for 256×256 pixel images can be computed at real time processing rates.",
author = "Kim, {Heung Nam} and Manjit Borah and Owens, {Robert Michael} and Irwin, {Mary Jane}",
year = "1994",
month = "12",
day = "1",
language = "English (US)",
pages = "356--367",
note = "Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing ; Conference date: 26-10-1994 Through 28-10-1994",

}

Kim, HN, Borah, M, Owens, RM & Irwin, MJ 1994, '2-D discrete cosine transforms on a fine grain array processor', Paper presented at Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing, La Jolla, CA, USA, 10/26/94 - 10/28/94 pp. 356-367.

2-D discrete cosine transforms on a fine grain array processor. / Kim, Heung Nam; Borah, Manjit; Owens, Robert Michael; Irwin, Mary Jane.

1994. 356-367 Paper presented at Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing, La Jolla, CA, USA, .

Research output: Contribution to conferencePaper

TY - CONF

T1 - 2-D discrete cosine transforms on a fine grain array processor

AU - Kim, Heung Nam

AU - Borah, Manjit

AU - Owens, Robert Michael

AU - Irwin, Mary Jane

PY - 1994/12/1

Y1 - 1994/12/1

N2 - The 2-D DCT has been an industry standard in image data compression. Since its first introduction, a number of fast algorithms and technique have been introduced. Most of them were implemented using specialized VLSI chips. In this paper we present an efficient systolic 2-D DCT algorithm on a 2-D mesh fine-grained array processor. Our algorithm reads non-skewed input subimages and generates the output in non-skewed form with only a small amount of extra processors. It uses the minimum number of multiplications by employing modified small n algorithms. Our implementation of the 2-D DCT on the Micro Grained Array Processor (MGAP), which is a fine-grained and mesh-connected array processor being developed at the Penn State University, exploits massive parallelism. As a result the 2-D DCT of size 8×8 and 16×16 pixels for 256×256 pixel images can be computed at real time processing rates.

AB - The 2-D DCT has been an industry standard in image data compression. Since its first introduction, a number of fast algorithms and technique have been introduced. Most of them were implemented using specialized VLSI chips. In this paper we present an efficient systolic 2-D DCT algorithm on a 2-D mesh fine-grained array processor. Our algorithm reads non-skewed input subimages and generates the output in non-skewed form with only a small amount of extra processors. It uses the minimum number of multiplications by employing modified small n algorithms. Our implementation of the 2-D DCT on the Micro Grained Array Processor (MGAP), which is a fine-grained and mesh-connected array processor being developed at the Penn State University, exploits massive parallelism. As a result the 2-D DCT of size 8×8 and 16×16 pixels for 256×256 pixel images can be computed at real time processing rates.

UR - http://www.scopus.com/inward/record.url?scp=0028746727&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0028746727&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0028746727

SP - 356

EP - 367

ER -

Kim HN, Borah M, Owens RM, Irwin MJ. 2-D discrete cosine transforms on a fine grain array processor. 1994. Paper presented at Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing, La Jolla, CA, USA, .