2-D discrete cosine transforms on a fine grain array processor

Heung Nam Kim, Manjit Borah, Robert Michael Owens, Mary Jane Irwin

Research output: Contribution to conferencePaper

1 Scopus citations

Abstract

The 2-D DCT has been an industry standard in image data compression. Since its first introduction, a number of fast algorithms and technique have been introduced. Most of them were implemented using specialized VLSI chips. In this paper we present an efficient systolic 2-D DCT algorithm on a 2-D mesh fine-grained array processor. Our algorithm reads non-skewed input subimages and generates the output in non-skewed form with only a small amount of extra processors. It uses the minimum number of multiplications by employing modified small n algorithms. Our implementation of the 2-D DCT on the Micro Grained Array Processor (MGAP), which is a fine-grained and mesh-connected array processor being developed at the Penn State University, exploits massive parallelism. As a result the 2-D DCT of size 8×8 and 16×16 pixels for 256×256 pixel images can be computed at real time processing rates.

Original languageEnglish (US)
Pages356-367
Number of pages12
StatePublished - Dec 1 1994
EventProceedings of the 1994 IEEE International Workshop VLSI Signal Processing - La Jolla, CA, USA
Duration: Oct 26 1994Oct 28 1994

Other

OtherProceedings of the 1994 IEEE International Workshop VLSI Signal Processing
CityLa Jolla, CA, USA
Period10/26/9410/28/94

All Science Journal Classification (ASJC) codes

  • Signal Processing

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    Kim, H. N., Borah, M., Owens, R. M., & Irwin, M. J. (1994). 2-D discrete cosine transforms on a fine grain array processor. 356-367. Paper presented at Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing, La Jolla, CA, USA, .