A Cache coherence protocol for MIN-based multiprocessors

Mazin S. Yousif, Chitaranjan Das, Matthew J. Thazhuthaveetil

Research output: Contribution to journalArticle

Abstract

In this paper we present a cache coherence protocol for multistage interconnection network (MIN)-based multiprocessors with two distinct private caches:privateblocks caches (PCache) containing blocks private to a process and shared-blocks caches (SCache) containing data accessible by all processes. The architecture is extended by a coherence control bus connecting all shared-block cache controllers. Timing problems due to variable transit delays through the MIN are dealt with by introducing Transient states in the proposed cache coherence protocol. The impact of the coherence protocol on system performance is evaluated through a performance study of three phases. Assuming homogeneity of all nodes, a single-node queuing model (phase 3) is developed to analyze system performance. This model is solved for processor and coherence bus utilizations using the mean value analysis (MVA) technique with shared-blocks steady state probabilities (phase 1) and communication delays (phase 2) as input parameters. The performance of our system is compared to that of a system with an equivalent-sized unified cache and with a multiprocessor implementing a directory-based coherence protocol. System performance measures are verified through simulation.

Original languageEnglish (US)
Pages (from-to)163-185
Number of pages23
JournalThe Journal of Supercomputing
Volume8
Issue number2
DOIs
StatePublished - Jun 1 1994

Fingerprint

Multistage Interconnection Networks
Cache Coherence
Multiprocessor
Cache
System Performance
Mean Value Analysis
Variable Delay
Queuing Model
Communication Delay
Transient State
Vertex of a graph
Value engineering
Homogeneity
Performance Measures
Timing
Distinct
Controller
Controllers
Communication
Simulation

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Information Systems
  • Hardware and Architecture

Cite this

Yousif, Mazin S. ; Das, Chitaranjan ; Thazhuthaveetil, Matthew J. / A Cache coherence protocol for MIN-based multiprocessors. In: The Journal of Supercomputing. 1994 ; Vol. 8, No. 2. pp. 163-185.
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A Cache coherence protocol for MIN-based multiprocessors. / Yousif, Mazin S.; Das, Chitaranjan; Thazhuthaveetil, Matthew J.

In: The Journal of Supercomputing, Vol. 8, No. 2, 01.06.1994, p. 163-185.

Research output: Contribution to journalArticle

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