TY - JOUR
T1 - A Dual-Output Reconfigurable Shared-Inductor Boost-Converter/Current-Mode Inductive Power Management ASIC with 750% Extended Output-Power Range, Adaptive Switching Control, and Voltage-Power Regulation
AU - Gougheri, Hesam Sadeghi
AU - Graybill, Philip
AU - Kiani, Mehdi
N1 - Funding Information:
Manuscript received June 4, 2019; revised July 20, 2019 and August 20, 2019; accepted August 21, 2019. Date of publication August 23, 2019; date of current version November 4, 2019. This work was supported in part by the National Institutes of Health under Grant 1R21EY029424. This paper was recommended by Associate Editor S. Ha. (Corresponding author: Mehdi Kiani.) The authors are with the School of Electrical Engineering and Computer Science, Pennsylvania State University, University Park, PA 16802 USA (e-mail: hqs5287@psu.edu; ppg5033@psu.edu; mkiani@psu.edu).
Publisher Copyright:
© 2019 IEEE.
PY - 2019/10
Y1 - 2019/10
N2 - This paper describes a dual-output, reconfigurable integrated power management (IPM) ASIC for inductive power delivery. The proposed ASIC operates either as a current-mode (CM) rectifier or a boost converter by sharing the receiver (Rx) coil (LRx) to improve performance of inductive power transmission against the variations of Rx input power (PRx) and dual-output DC power (PL+ PHv). Conventional IPM structures either fail to generate regulated outputs (e.g., VL and VHv when the required PL+ PHv exceeds PRx or suffer from low power-conversion efficiency (PCE) when PRx exceeds PL+ PHv due to voltage regulation and protection. To overcome these challenges, the proposed ASIC offers the unique capabilities of 1) generating multiple regulated outputs (VL= 2.6 V, VHv= 3.9 V) directly from LRx with single-stage conversion, 2) efficient CM operation with active rectification, enabled by adaptive switching control (ASC), 3) charging a large capacitor (CS) with the purpose of operating as a shared-inductor boost converter (SBC), transferring energy from CS to CL and CHv, when PRx< PL+ PHv, and 4) efficient voltage-power regulation (VPR). A proof-of-concept chip was fabricated in a 0.35-μm 2P4M standard CMOS process occupying 1.35-mm2 active area. In measurements, the proposed ASIC was able to successfully provide regulated VL= 2.6 V and VHv= 3.9 V despite significant variations in PRx, PL, and PHv. Moreover, the chip extended the peak output power range by 750% and improved the PCE by 1.3 times and 8.1 times thanks to the ASC and VPR, respectively.
AB - This paper describes a dual-output, reconfigurable integrated power management (IPM) ASIC for inductive power delivery. The proposed ASIC operates either as a current-mode (CM) rectifier or a boost converter by sharing the receiver (Rx) coil (LRx) to improve performance of inductive power transmission against the variations of Rx input power (PRx) and dual-output DC power (PL+ PHv). Conventional IPM structures either fail to generate regulated outputs (e.g., VL and VHv when the required PL+ PHv exceeds PRx or suffer from low power-conversion efficiency (PCE) when PRx exceeds PL+ PHv due to voltage regulation and protection. To overcome these challenges, the proposed ASIC offers the unique capabilities of 1) generating multiple regulated outputs (VL= 2.6 V, VHv= 3.9 V) directly from LRx with single-stage conversion, 2) efficient CM operation with active rectification, enabled by adaptive switching control (ASC), 3) charging a large capacitor (CS) with the purpose of operating as a shared-inductor boost converter (SBC), transferring energy from CS to CL and CHv, when PRx< PL+ PHv, and 4) efficient voltage-power regulation (VPR). A proof-of-concept chip was fabricated in a 0.35-μm 2P4M standard CMOS process occupying 1.35-mm2 active area. In measurements, the proposed ASIC was able to successfully provide regulated VL= 2.6 V and VHv= 3.9 V despite significant variations in PRx, PL, and PHv. Moreover, the chip extended the peak output power range by 750% and improved the PCE by 1.3 times and 8.1 times thanks to the ASC and VPR, respectively.
UR - http://www.scopus.com/inward/record.url?scp=85074874391&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85074874391&partnerID=8YFLogxK
U2 - 10.1109/TBCAS.2019.2937253
DO - 10.1109/TBCAS.2019.2937253
M3 - Article
C2 - 31449030
AN - SCOPUS:85074874391
VL - 13
SP - 1075
EP - 1086
JO - IEEE Transactions on Biomedical Circuits and Systems
JF - IEEE Transactions on Biomedical Circuits and Systems
SN - 1932-4545
IS - 5
M1 - 8811614
ER -