A dynamic frequency linear array processor for image processing

N. Ranganathan, Naveen Bhavanishankar, N. Vijaykrishnan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

In this paper, we propose a dynamic frequency linear array processor, DFLAP, for real-time image processing applications. The architecture uses a novel concept of dynamic frequency clocking which allows the chip to operate between, a maximum frequency of 400 MHz and a minimum frequency of 50 MHz based on the operation being performed. The dynamic clocking scheme is especially useful in the contest of image processing applications where certain tasks require only logic functions while others require only additions and certain others multiplication or division. The proposed architecture provides speedup by supporting two levels of parallelism and using variable frequency single clock cycle operations. DFLAP provides parallelism at the array level using multiple processing elements (PEs) and at a functional level allowing concurrent use of various units in the PE. The array architecture contains N PEs, where the image size is N/spl times/N and each PE in turn contains an a-bit arithmetic/logic unit, an 8/spl times/8 single-cycle multiplier, a shifter, a neighbor communication unit, a 32/spl times/8 dual port SRAM and a dynamic clocking unit (DCU). The DCU an each PE enables dynamic switching of clock frequencies. The dynamic clocking scheme provided a speedup ranging from 1.5 to 3 over the uni-frequency clocking for various low level pattern recognition and image processing algorithms that were mapped onto the chip.

Original languageEnglish (US)
Title of host publicationTrack D
Subtitle of host publicationParallel and Connectionist Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages611-615
Number of pages5
ISBN (Print)081867282X, 9780818672828
DOIs
StatePublished - 1996
Event13th International Conference on Pattern Recognition, ICPR 1996 - Vienna, Austria
Duration: Aug 25 1996Aug 29 1996

Publication series

NameProceedings - International Conference on Pattern Recognition
Volume4
ISSN (Print)1051-4651

Other

Other13th International Conference on Pattern Recognition, ICPR 1996
CountryAustria
CityVienna
Period8/25/968/29/96

All Science Journal Classification (ASJC) codes

  • Computer Vision and Pattern Recognition

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