TY - JOUR
T1 - A FerroFET-Based In-Memory Processor for Solving Distributed and Iterative Optimizations via Least-Squares Method
AU - Yoon, Insik
AU - Khan, Asif
AU - Datta, Suman
AU - Raychowdhury, Arijit
AU - Chang, Muya
AU - Ni, Kai
AU - Jerry, Matthew
AU - Gangopadhyay, Samantak
AU - Smith, Gus Henry
AU - Hamam, Tomer
AU - Romberg, Justin
AU - Narayanan, Vijaykrishnan
N1 - Funding Information:
1Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332 USA 2Department of Electrical Engineering, University of Notre Dame, South Bend, IN 46556 USA 3Department of Computer Science and Engineering and Electrical Engineering, Penn State University, State College, PA 16801 USA CORRESPONDING AUTHOR: A. RAYCHOWDHURY (arijit.raychowdhury@ece.gatech.edu) This work was supported in part by the Semiconductor Research Corporation (SRC) through Extremely Energy Efficient Collective Electronics (EXCEL), an SRC-Nanoelectronics Research Initiative (NRI) under Grant ID 2698.002 and in part by the Joint University Microelectronics Program (JUMP) Applications and Systems driven Center for Energy-Efficient Integrated NanoTechnologies (ASCENT) under Grant 2776.044.
Publisher Copyright:
© 2014 IEEE.
PY - 2019/12
Y1 - 2019/12
N2 - In recent years, several designs that use in-memory processing to accelerate machine-learning inference problems have been proposed. Such designs are also a perfect fit for discrete, dynamic, and distributed systems that can solve large-dimensional optimization problems using iterative algorithms. For in-memory computations, ferroelectric field-effect transistors (FerroFETs) owing to their compact area and distinguishable multiple states offer promising possibilities. We present a distributed architecture that uses FerroFET memory and implements in-memory processing to solve a template problem of least squares minimization. Through this architecture, we demonstrate an improvement of 21 × in energy efficiency and 3 × in compute time compared to a static random access memory (SRAM)-based processing-in-memory (PIM) architecture.
AB - In recent years, several designs that use in-memory processing to accelerate machine-learning inference problems have been proposed. Such designs are also a perfect fit for discrete, dynamic, and distributed systems that can solve large-dimensional optimization problems using iterative algorithms. For in-memory computations, ferroelectric field-effect transistors (FerroFETs) owing to their compact area and distinguishable multiple states offer promising possibilities. We present a distributed architecture that uses FerroFET memory and implements in-memory processing to solve a template problem of least squares minimization. Through this architecture, we demonstrate an improvement of 21 × in energy efficiency and 3 × in compute time compared to a static random access memory (SRAM)-based processing-in-memory (PIM) architecture.
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U2 - 10.1109/JXCDC.2019.2930222
DO - 10.1109/JXCDC.2019.2930222
M3 - Article
AN - SCOPUS:85069901619
VL - 5
SP - 132
EP - 141
JO - IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
JF - IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
SN - 2329-9231
IS - 2
M1 - 8767985
ER -