Abstract
This paper presents a high-efficiency switched capacitance charge pump in 20 nm III-V heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage applications. The steep-slope and low-threshold HTFET device characteristics are utilized to extend the input voltage range to below 0.20 V. Meanwhile, the uni-directional current conduction is utilized to reduce the reverse energy loss and to simplify the non-overlapping phase controlling. Furthermore, with unidirectional current conduction, an improved cross-coupled charge pump topology is proposed for higher voltage output and PCE. Simulation results show that the proposed HTFET charge pump with a 1.0 kΩ resistive load achieves 90.4% and 91.4% power conversion efficiency, and 0.37 V and 0.57 V DC output voltage, when the input voltage is 0.20 V and 0.30 V, respectively.
| Original language | English (US) |
|---|---|
| Article number | 7031751 |
| Pages (from-to) | 304-309 |
| Number of pages | 6 |
| Journal | Proceedings of the IEEE International Conference on VLSI Design |
| Volume | 2015-February |
| Issue number | February |
| DOIs | |
| State | Published - Feb 4 2015 |
| Event | 28th International Conference on VLSI Design, VLSID 2015 - held concurrently with the 14th International Conference on Embedded Systems - Bangalore, India Duration: Jan 3 2015 → Jan 7 2015 |
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All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
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}
A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications. / Heo, Unsuk; Li, Xueqing; Liu, Huichu; Gupta, Sumeet Kumar; Datta, Suman; Narayanan, Vijaykrishnan.
In: Proceedings of the IEEE International Conference on VLSI Design, Vol. 2015-February, No. February, 7031751, 04.02.2015, p. 304-309.Research output: Contribution to journal › Conference article
TY - JOUR
T1 - A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications
AU - Heo, Unsuk
AU - Li, Xueqing
AU - Liu, Huichu
AU - Gupta, Sumeet Kumar
AU - Datta, Suman
AU - Narayanan, Vijaykrishnan
PY - 2015/2/4
Y1 - 2015/2/4
N2 - This paper presents a high-efficiency switched capacitance charge pump in 20 nm III-V heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage applications. The steep-slope and low-threshold HTFET device characteristics are utilized to extend the input voltage range to below 0.20 V. Meanwhile, the uni-directional current conduction is utilized to reduce the reverse energy loss and to simplify the non-overlapping phase controlling. Furthermore, with unidirectional current conduction, an improved cross-coupled charge pump topology is proposed for higher voltage output and PCE. Simulation results show that the proposed HTFET charge pump with a 1.0 kΩ resistive load achieves 90.4% and 91.4% power conversion efficiency, and 0.37 V and 0.57 V DC output voltage, when the input voltage is 0.20 V and 0.30 V, respectively.
AB - This paper presents a high-efficiency switched capacitance charge pump in 20 nm III-V heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage applications. The steep-slope and low-threshold HTFET device characteristics are utilized to extend the input voltage range to below 0.20 V. Meanwhile, the uni-directional current conduction is utilized to reduce the reverse energy loss and to simplify the non-overlapping phase controlling. Furthermore, with unidirectional current conduction, an improved cross-coupled charge pump topology is proposed for higher voltage output and PCE. Simulation results show that the proposed HTFET charge pump with a 1.0 kΩ resistive load achieves 90.4% and 91.4% power conversion efficiency, and 0.37 V and 0.57 V DC output voltage, when the input voltage is 0.20 V and 0.30 V, respectively.
UR - http://www.scopus.com/inward/record.url?scp=84938280526&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84938280526&partnerID=8YFLogxK
U2 - 10.1109/VLSID.2015.58
DO - 10.1109/VLSID.2015.58
M3 - Conference article
AN - SCOPUS:84938280526
VL - 2015-February
SP - 304
EP - 309
JO - Proceedings of the IEEE International Conference on VLSI Design
JF - Proceedings of the IEEE International Conference on VLSI Design
SN - 1063-9667
IS - February
M1 - 7031751
ER -