### Abstract

This paper summarizes the design and implementation of a parallel algorithm for state assignment of large Finite State Machines (FSMs). High performance CAD tools are necessary to overcome the computational complexity involved in the optimization of large sequential circuits. FSMs constitute an important class of logic circuits, and state assignment is one of the key steps in combinational logic optimization. The SMP-based parallel algorithm - based on the sequential program JEDI targeting multilevel logic implementation - scales nearly linearly with the number of processors for FSMs of varying problem sizes chosen from standard benchmark suites while attaining quality of results comparable to the best sequential algorithms.

Original language | English (US) |
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Pages (from-to) | 297-308 |

Number of pages | 12 |

Journal | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |

Volume | 3296 |

State | Published - Dec 1 2004 |

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### All Science Journal Classification (ASJC) codes

- Theoretical Computer Science
- Computer Science(all)

### Cite this

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**A parallel state assignment algorithm for finite state machines.** / Bader, David A.; Madduri, Kamesh.

Research output: Contribution to journal › Article

TY - JOUR

T1 - A parallel state assignment algorithm for finite state machines

AU - Bader, David A.

AU - Madduri, Kamesh

PY - 2004/12/1

Y1 - 2004/12/1

N2 - This paper summarizes the design and implementation of a parallel algorithm for state assignment of large Finite State Machines (FSMs). High performance CAD tools are necessary to overcome the computational complexity involved in the optimization of large sequential circuits. FSMs constitute an important class of logic circuits, and state assignment is one of the key steps in combinational logic optimization. The SMP-based parallel algorithm - based on the sequential program JEDI targeting multilevel logic implementation - scales nearly linearly with the number of processors for FSMs of varying problem sizes chosen from standard benchmark suites while attaining quality of results comparable to the best sequential algorithms.

AB - This paper summarizes the design and implementation of a parallel algorithm for state assignment of large Finite State Machines (FSMs). High performance CAD tools are necessary to overcome the computational complexity involved in the optimization of large sequential circuits. FSMs constitute an important class of logic circuits, and state assignment is one of the key steps in combinational logic optimization. The SMP-based parallel algorithm - based on the sequential program JEDI targeting multilevel logic implementation - scales nearly linearly with the number of processors for FSMs of varying problem sizes chosen from standard benchmark suites while attaining quality of results comparable to the best sequential algorithms.

UR - http://www.scopus.com/inward/record.url?scp=35048862988&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=35048862988&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:35048862988

VL - 3296

SP - 297

EP - 308

JO - Lecture Notes in Computer Science

JF - Lecture Notes in Computer Science

SN - 0302-9743

ER -