A power and resolution adaptive flash analog-to-digital converter

Jincheol Yoo; Daegyu Lee; Kyusun Choi; Jongsoo Kim

doi:10.1145/566465.566468

A power and resolution adaptive flash analog-to-digital converter

Jincheol Yoo, Daegyu Lee, Kyusun Choi, Jongsoo Kim

Computer Science and Engineering

Research output: Contribution to conference › Paper › peer-review

32 Scopus citations

Abstract

A new power and resolution adaptive flash ADC, named PRA-ADC, is proposed. The PRA-ADC enables exponential power reduction with linear resolution reduction. Unused parallel voltage comparators are switched to standby mode. The voltage comparators consume only the leakage power during the standby mode. The PRA-ADC, capable of operating at 5-bit, 6-bit, 7-bit, and 8-bit precision, dissipates 69 mW at 5-bit and 435 mW at 8-bit. The PRA-ADC was designed and simulated with 0.18 μm CMOS technology. The PRA-ADC design is applicable to RD portable communication devices, allowing tighter management of power and efficiency.

Original language	English (US)
Pages	233-236
Number of pages	4
DOIs	https://doi.org/10.1145/566465.566468
State	Published - 2002
Event	Proceedings of the 2002 International Symposium on Low Power Electronics and Design - Monterey, CA, United States Duration: Aug 12 2002 → Aug 14 2002

Other

Other	Proceedings of the 2002 International Symposium on Low Power Electronics and Design
Country/Territory	United States
City	Monterey, CA
Period	8/12/02 → 8/14/02

All Science Journal Classification (ASJC) codes

Engineering(all)

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10.1145/566465.566468

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title = "A power and resolution adaptive flash analog-to-digital converter",

abstract = "A new power and resolution adaptive flash ADC, named PRA-ADC, is proposed. The PRA-ADC enables exponential power reduction with linear resolution reduction. Unused parallel voltage comparators are switched to standby mode. The voltage comparators consume only the leakage power during the standby mode. The PRA-ADC, capable of operating at 5-bit, 6-bit, 7-bit, and 8-bit precision, dissipates 69 mW at 5-bit and 435 mW at 8-bit. The PRA-ADC was designed and simulated with 0.18 μm CMOS technology. The PRA-ADC design is applicable to RD portable communication devices, allowing tighter management of power and efficiency.",

author = "Jincheol Yoo and Daegyu Lee and Kyusun Choi and Jongsoo Kim",

year = "2002",

doi = "10.1145/566465.566468",

language = "English (US)",

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note = "Proceedings of the 2002 International Symposium on Low Power Electronics and Design ; Conference date: 12-08-2002 Through 14-08-2002",

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T1 - A power and resolution adaptive flash analog-to-digital converter

AU - Yoo, Jincheol

AU - Lee, Daegyu

AU - Choi, Kyusun

AU - Kim, Jongsoo

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N2 - A new power and resolution adaptive flash ADC, named PRA-ADC, is proposed. The PRA-ADC enables exponential power reduction with linear resolution reduction. Unused parallel voltage comparators are switched to standby mode. The voltage comparators consume only the leakage power during the standby mode. The PRA-ADC, capable of operating at 5-bit, 6-bit, 7-bit, and 8-bit precision, dissipates 69 mW at 5-bit and 435 mW at 8-bit. The PRA-ADC was designed and simulated with 0.18 μm CMOS technology. The PRA-ADC design is applicable to RD portable communication devices, allowing tighter management of power and efficiency.

AB - A new power and resolution adaptive flash ADC, named PRA-ADC, is proposed. The PRA-ADC enables exponential power reduction with linear resolution reduction. Unused parallel voltage comparators are switched to standby mode. The voltage comparators consume only the leakage power during the standby mode. The PRA-ADC, capable of operating at 5-bit, 6-bit, 7-bit, and 8-bit precision, dissipates 69 mW at 5-bit and 435 mW at 8-bit. The PRA-ADC was designed and simulated with 0.18 μm CMOS technology. The PRA-ADC design is applicable to RD portable communication devices, allowing tighter management of power and efficiency.

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T2 - Proceedings of the 2002 International Symposium on Low Power Electronics and Design

Y2 - 12 August 2002 through 14 August 2002

ER -

A power and resolution adaptive flash analog-to-digital converter

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