A strong arbiter PUF using resistive RAM within 1T-1R memory architecture

Rekha Govindaraj, Swaroop Ghosh

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Scopus citations

    Abstract

    Physically Unclonable Function (PUF) is cost effective and reliable security primitives widely used in authentication and in-place secret key generation. With growing research in the area of non-CMOS technologies for memories and circuits, it is important to understand their implications on the design of security primitives. Resistive Random Accessible Memory (RRAM) offers easy integration with CMOS due to minimal changes in the process technology. RRAM also demonstrates resistance variability characteristics due to inherent defects in the conducting filament formed inside the metal oxide layer. RRAM based PUF designs exploit either the probabilistic switching of RRAM or the resistance variability during forming, SET and RESET processes. Memory PUFs using RRAM are typically weak PUFs due to fewer number of Challenge Response Pairs (CRPs). We propose strong arbiter PUF based on 1T-1R bit cell which is obtained from conventional RRAM memory array with minimally invasive changes. Conventional voltage sense amplifier is employed to generate the response. The PUF is simulated using 65nm predictive technology models for CMOS and Verilog-A model for a hafnium oxide based RRAM. The proposed PUF architecture is evaluated for uniqueness, uniformity and reliability and by running NIST benchmarks. It demonstrates mean intra-die Hamming Distance (HD) of 0.13% and inter-die HD of 51.3%, and, passes the NIST tests.

    Original languageEnglish (US)
    Title of host publicationProceedings of the 34th IEEE International Conference on Computer Design, ICCD 2016
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages141-148
    Number of pages8
    ISBN (Electronic)9781509051427
    DOIs
    StatePublished - Nov 22 2016
    Event34th IEEE International Conference on Computer Design, ICCD 2016 - Scottsdale, United States
    Duration: Oct 2 2016Oct 5 2016

    Publication series

    NameProceedings of the 34th IEEE International Conference on Computer Design, ICCD 2016

    Other

    Other34th IEEE International Conference on Computer Design, ICCD 2016
    CountryUnited States
    CityScottsdale
    Period10/2/1610/5/16

    All Science Journal Classification (ASJC) codes

    • Hardware and Architecture

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  • Cite this

    Govindaraj, R., & Ghosh, S. (2016). A strong arbiter PUF using resistive RAM within 1T-1R memory architecture. In Proceedings of the 34th IEEE International Conference on Computer Design, ICCD 2016 (pp. 141-148). [7753272] (Proceedings of the 34th IEEE International Conference on Computer Design, ICCD 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCD.2016.7753272