A memory device is proposed which is intended to fill the memory access gap, i.e., whose speed, cost, and capacity are intermediate between those of the electronic and electromechanical memories. Information is stored by electroplating metal on one or the other of two electrodes. The memory is random access and nonvolatile. Selection is by a coincident voltage technique and stack operation is similar to the operation of core memories. The estimated driving requirement of a selection line is 1 V at 1 mA, indicating that small area IC logic circuits will be able to drive the memory. The proposed memory will be mass fabricated and the cost is foreseen as being primarily the interconnection cost between the IC decoding and sensing chips and the bit select conductors. The cost is estimated at 5 mcents/bit. Measurements of the I-V characteristics, capacitance, switching time, and READ discrimination in a single cell indicate that operation with a cycle time of 100 to 200 µs is feasible and consistent with a stack size of 108 bits. The eventual feasibility of the memory will depend on the solution of two main problems: Obtaining an adequate selection threshold and eliminating or reducing the reaction of the electrodeposited metal with trace impurities in the electrolyte. Possible ways of attaining these goals are discussed; however, until these goals are achieved the proposed memory must be viewed as speculative. It should be pointed out, however, that based on the state of current electrochemical theory no fundamental reason exists as to why the goals may not be achieved.
All Science Journal Classification (ASJC) codes
- Theoretical Computer Science
- Hardware and Architecture
- Computational Theory and Mathematics