This paper describes a high-level development system that can be used to design, simulate, and test high performance VLSI signal processors (filters, convolvers, transformers). While the system uses a number of previously studied techniques (silicon compilation, hierarchical design, and hardware description languages), they are combined in a novel way within the development system. Furthermore, the development system allowed us to investigate how these techniques interrelate with one another. The design process is fully automated and requires that the user specify only a few parameters such as operation, precision, size, and architecture type. The built-in digit pipelined architectures are based on a class of fast algorithms for the above operations. The basic components are compact and have a very small gate delay.
|Original language||English (US)|
|Number of pages||9|
|Journal||IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems|
|State||Published - Jul 1986|
All Science Journal Classification (ASJC) codes
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering