A threshold switch augmented hybrid-FeFET (H-FeFET) with enhanced read distinguishability and reduced programming voltage for non-volatile memory applications

M. Jerry, A. Aziz, K. Ni, S. Datta, S. K. Gupta, N. Shukla

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

In this work, we demonstrate a novel Hybrid-FeFET (H-FeFET) that leverages the threshold switching characteristics of Ag/HfO2 to overcome the fundamental trade-off between memory window MW /read current ratio (Iread,1/Iread,0) , and program voltage (Vprog)/maximum electric-field in standard FeFETs for non-volatile memory application. The H-FeFET incorporates the threshold switch (TS) in the source of the FeFET, and is designed to exhibit a ferroelectric state-dependent volatile HRS to LRS transition (ION/IOFF >107)-during read, the TS turns ON only if the FeFET is in the low-VT SET state, and remains OFF if the FeFET is in the high-VT RESET state, thus, selectively suppressing the RESET read current. Leveraging this principle, the H-FeFET: a Demonstrates 77% higher MW and 1000× larger Iread,1/Iread,0 compared to the FeFET, at iso-Vprog (DC); (b) Enables 25% reduction in Vprog at iso-Iread,1/Iread,0 during pulse operation-facilitated by the 8× improvement in Iread,1/Iread,0; (c) Exhibits 2.5×reduction in programming power at iso-Iread,1/Iread,0 in the H-FeFET-based AND array architecture, as shown by simulations. Thus, the H-FeFET overcomes the FeFET design challenges while retaining its existing advantages, making it a promising candidate for nonvolatile memory applications.

Original languageEnglish (US)
Title of host publication2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages129-130
Number of pages2
ISBN (Electronic)9781538642160
DOIs
StatePublished - Oct 25 2018
Event38th IEEE Symposium on VLSI Technology, VLSI Technology 2018 - Honolulu, United States
Duration: Jun 18 2018Jun 22 2018

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2018-June
ISSN (Print)0743-1562

Other

Other38th IEEE Symposium on VLSI Technology, VLSI Technology 2018
CountryUnited States
CityHonolulu
Period6/18/186/22/18

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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