Achieved IPC performance

Jochen Liedtke, Kevin Elphinstone, Sebastian Schonberg, Hermann Hartig, Gernot Heiser, Nayeem Islam, Trent Ray Jaeger

Research output: Chapter in Book/Report/Conference proceedingConference contribution

41 Scopus citations

Abstract

Extensibility can be based on cross-address-space communication or on grafting application-specific modules into the operating system. For comparing both approaches, we need to explore the best achievable performance for both models. This paper reports the achieved performance of cross-address-space communication for the L4 μ-kernel on Intel Pentium, Mips R4600 and DEC Alpha. The direct costs range from 45 cycles (Alpha) to 121 cycles (Pentium). Since only 2.3% of the L1 cache are required (Pentium), the average indirect costs are not to be expected much higher.

Original languageEnglish (US)
Title of host publicationProceedings of the Workshop on Hot Topics in Operating Systems - HOTOS
PublisherIEEE
Pages28-31
Number of pages4
StatePublished - 1997
EventProceedings of the 1997 6th Workshop on Hot Topics in Operating Systems, HOTOS - Cape Cod, MA, USA
Duration: May 5 1997May 6 1997

Other

OtherProceedings of the 1997 6th Workshop on Hot Topics in Operating Systems, HOTOS
CityCape Cod, MA, USA
Period5/5/975/6/97

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

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  • Cite this

    Liedtke, J., Elphinstone, K., Schonberg, S., Hartig, H., Heiser, G., Islam, N., & Jaeger, T. R. (1997). Achieved IPC performance. In Proceedings of the Workshop on Hot Topics in Operating Systems - HOTOS (pp. 28-31). IEEE.