Addressing end-to-end memory access latency in NoC-based multicores

Akbar Sharifi, Emre Kultursay, Mahmut Kandemir, Chitaranjan Das

Research output: Chapter in Book/Report/Conference proceedingConference contribution

33 Scopus citations

Abstract

To achieve high performance in emerging multicores, it is crucial to reduce the number of memory accesses that suffer from very high latencies. However, this should be done with care as improving latency of an access can worsen the latency of another as a result of resource sharing. Therefore, the goal should be to balance latencies of memory accesses issued by an application in an execution phase, while ensuring a low average latency value. Targeting Network-on-Chip (NoC) based multicores, we propose two network prioritization schemes that can cooperatively improve performance by reducing end-to-end memory access latencies. Our first scheme prioritizes memory response messages such that, in a given period of time, messages of an application that experience higher latencies than the average message latency for that application are expedited and a more uniform memory latency pattern is achieved. Our second scheme prioritizes the request messages that are destined for idle memory banks over others, with the goal of improving bank utilization and preventing long queues from being built in front of the memory banks. These two network prioritization-based optimizations together lead to uniform memory access latencies with a low average value. Our experiments with a 4x8 mesh network-based multicore show that, when applied together, our schemes can achieve 15%, 10% and 13% performance improvement on memory intensive, memory non-intensive, and mixed multiprogrammed workloads, respectively.

Original languageEnglish (US)
Title of host publicationProceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012
Pages294-304
Number of pages11
DOIs
StatePublished - Dec 1 2012
Event2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012 - Vancouver, BC, Canada
Duration: Dec 1 2012Dec 5 2012

Publication series

NameProceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012

Other

Other2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012
CountryCanada
CityVancouver, BC
Period12/1/1212/5/12

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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    Sharifi, A., Kultursay, E., Kandemir, M., & Das, C. (2012). Addressing end-to-end memory access latency in NoC-based multicores. In Proceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012 (pp. 294-304). [6493628] (Proceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012). https://doi.org/10.1109/MICRO.2012.35