An analytical power estimation model for crossbar interconnects

E. Geethanjali, Vijaykrishnan Narayanan, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

Low power optimizations have become an integral part of designing computing system. One important part of low power design is accurate and efficient power estimation during the design phase in order to meet the power specifications without a costly redesign process. Power estimation refers to the process of determining with a high level of confidence, the power consumed by a circuit/component. A lot of work has been done to come up with power estimation tools for different components of computing systems. In this work, we look at modeling one such component, The crossbar interconnect.

Original languageEnglish (US)
Title of host publicationProceedings - 15th Annual IEEE International ASIC/SOC Conference, ASIC/SOC 2002
EditorsJohn Chickanosky, Ram K. Krishnamurthy, P.R. Mukund
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages119-123
Number of pages5
ISBN (Electronic)0780374940
DOIs
StatePublished - Jan 1 2002
Event15th Annual IEEE International ASIC/SOC Conference, ASIC/SOC 2002 - Rochester, United States
Duration: Sep 25 2002Sep 28 2002

Publication series

NameProceedings of the Annual IEEE International ASIC Conference and Exhibit
Volume2002-January
ISSN (Print)1063-0988

Other

Other15th Annual IEEE International ASIC/SOC Conference, ASIC/SOC 2002
CountryUnited States
CityRochester
Period9/25/029/28/02

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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