An architecture for motion estimation in the transform domain

J. Lee, Vijaykrishnan Narayanan, M. J. Irwin, W. Wolf

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

In this paper, a novel architecture for transform domain motion estimation is proposed We derive a recursion equation from the algorithm and wavefront array processors are used to perform motion estimation algorithm adoptively in the transform domain according to the compression ratio. It is also shown that a higher throughput rate with the reduction of arithmetic building blocks, frame memory size and the number of memory accesses is achieved. The proposed architecture can also reconfigure to different algorithms that can be used to perform power-aware video encoding. Simulation results on video sequences of different characteristics show comparable performance of the proposed algorithm to spatial domain approaches in the aspects of PSNR and compression ratio.

Original languageEnglish (US)
Pages (from-to)1077-1082
Number of pages6
JournalProceedings of the IEEE International Conference on VLSI Design
Volume17
StatePublished - 2004

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Motion estimation
Data storage equipment
Wavefronts
Parallel processing systems
Throughput

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

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An architecture for motion estimation in the transform domain. / Lee, J.; Narayanan, Vijaykrishnan; Irwin, M. J.; Wolf, W.

In: Proceedings of the IEEE International Conference on VLSI Design, Vol. 17, 2004, p. 1077-1082.

Research output: Contribution to journalArticle

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