An evaluation of different page allocation strategies on high-speed SSDs

Myoungsoo Jung, Mahmut Kandemir

Research output: Contribution to conferencePaper

43 Scopus citations

Abstract

Exploiting internal parallelism over hundreds NAND flash memory is becoming a key design issue in high-speed Solid State Disks (SSDs). In this work, we simulated a cycle-accurate SSD platform with twenty four page allocation strategies, geared toward exploiting both system-level parallelism and flash-level parallelism with a variety of design parameters. Our extensive experimental analysis reveals that 1) the previously-proposed channel-and-way striping based page allocation scheme is not the best from a performance perspective, 2) As opposed to the current perception that system and flash-level concurrency mechanisms are largely orthogonal, flash-level parallelism are interfered by the system-level concurrency mechanism employed, and 3) With most of the current parallel data access methods, internal resources are significantly underutilized. Finally, we present several optimization points to achieve maximum internal parallelism.

Original languageEnglish (US)
StatePublished - Jan 1 2012
Event4th USENIX Workshop on Hot Topics in Storage and File Systems, HotStorage 2012 - Boston, United States
Duration: Jun 13 2012Jun 14 2012

Conference

Conference4th USENIX Workshop on Hot Topics in Storage and File Systems, HotStorage 2012
CountryUnited States
CityBoston
Period6/13/126/14/12

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Hardware and Architecture
  • Information Systems
  • Software

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    Jung, M., & Kandemir, M. (2012). An evaluation of different page allocation strategies on high-speed SSDs. Paper presented at 4th USENIX Workshop on Hot Topics in Storage and File Systems, HotStorage 2012, Boston, United States.