An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1

Tapan Khilnani, Sedig Agili, Aldo Morales, Jeremy Blum, Mike Resso

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A hash map implementation of the link analysis technique for obtaining jitter is proposed, under non-linear receiver conditions. The jitter PDF obtained from the link analysis, which typically assumes an LTI system, is passed through the I/O non-linear CMOS receiver voltage characteristics, obtaining the final jitter distribution. Simulations show promising results.

Original languageEnglish (US)
Title of host publication2016 IEEE International Conference on Consumer Electronics, ICCE 2016
EditorsFrancisco J. Bellido, Daniel Diaz-Sanchez, Nicholas C. H. Vun, Carsten Dolar, Wing-Kuen Ling
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages522-523
Number of pages2
ISBN (Electronic)9781467383646
DOIs
StatePublished - Mar 10 2016
EventIEEE International Conference on Consumer Electronics, ICCE 2016 - Las Vegas, United States
Duration: Jan 7 2016Jan 11 2016

Publication series

Name2016 IEEE International Conference on Consumer Electronics, ICCE 2016

Other

OtherIEEE International Conference on Consumer Electronics, ICCE 2016
CountryUnited States
CityLas Vegas
Period1/7/161/11/16

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1'. Together they form a unique fingerprint.

Cite this