TY - JOUR
T1 - Batch-Fabricated WSe-on-Sapphire Field-Effect Transistors Grown by Chemical Vapor Deposition
AU - Heidarlou, M. Asghari
AU - Paletti, P.
AU - Jariwala, B.
AU - Robinson, J. A.
AU - Fullerton-Shirey, S. K.
AU - Seabaugh, A. C.
N1 - Funding Information:
Manuscript received September 13, 2019; revised December 28, 2019; accepted February 7, 2020. Date of publication March 13, 2020; date of current version March 24, 2020. This work was supported in part by the Center for Low Energy Systems Technology (LEAST) sponsored by Microelectronics Advanced Research Corporation (MARCO) and Defense Advanced Research Projects Agency (DARPA). The review of this article was arranged by Editor L. Ge. (Corresponding author: M. Asghari Heidarlou.) M. Asghari Heidarlou is with the Department of Engineering, University of Southern Indiana, Evansville, IN 47712 USA (e-mail: masgharihe@ usi.edu).
Publisher Copyright:
© 1963-2012 IEEE.
PY - 2020/4
Y1 - 2020/4
N2 - Stepper-based batch fabrication of top-gated field-effect transistors (FETs) is demonstrated on few-layer WSe2-on-sapphire grown by chemical vapor deposition. This article reports the electrical characterization of 94 transistors with three different transistor structures. ON-/ OFF-current ratios exceeding 105 at room temperature with noise-floor-limited gate current and contact-limited ON-current density of 15 nA/ \mu \text{m} was achieved for FETs using a structure in which the gate overlaps the source and drain contacts. Two transistors with open channel access regions are used to allow ion doping through polyethylene oxide: cesium perchlorate (PEO: CsClO4) to induce electron and hole conductivity and allow characterization of the intrinsic FET characteristics. In these geometries, the ON-current increased by four orders of magnitude with ON-/ OFF-current ratio greater than 106 at {V}_{\text {DS}} = -0.05 V, compared to gate overlapped FETs. An analytic 2-D FET model was used to model the full current-voltage characteristics. This allowed the field-effect mobility to be extracted revealing the gate and drain field dependence for the first time. The fit of the measured characteristics from subthreshold to saturation is made with only four fitting parameters, revealing a field-dependent electron mobility ranging from 1 to 2.6 cm2/Vs.
AB - Stepper-based batch fabrication of top-gated field-effect transistors (FETs) is demonstrated on few-layer WSe2-on-sapphire grown by chemical vapor deposition. This article reports the electrical characterization of 94 transistors with three different transistor structures. ON-/ OFF-current ratios exceeding 105 at room temperature with noise-floor-limited gate current and contact-limited ON-current density of 15 nA/ \mu \text{m} was achieved for FETs using a structure in which the gate overlaps the source and drain contacts. Two transistors with open channel access regions are used to allow ion doping through polyethylene oxide: cesium perchlorate (PEO: CsClO4) to induce electron and hole conductivity and allow characterization of the intrinsic FET characteristics. In these geometries, the ON-current increased by four orders of magnitude with ON-/ OFF-current ratio greater than 106 at {V}_{\text {DS}} = -0.05 V, compared to gate overlapped FETs. An analytic 2-D FET model was used to model the full current-voltage characteristics. This allowed the field-effect mobility to be extracted revealing the gate and drain field dependence for the first time. The fit of the measured characteristics from subthreshold to saturation is made with only four fitting parameters, revealing a field-dependent electron mobility ranging from 1 to 2.6 cm2/Vs.
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U2 - 10.1109/TED.2020.2974450
DO - 10.1109/TED.2020.2974450
M3 - Article
AN - SCOPUS:85082877577
SN - 0018-9383
VL - 67
SP - 1839
EP - 1844
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 4
M1 - 9036090
ER -