Boosting Access Parallelism to PCM-Based Main Memory

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Scopus citations

Abstract

Despite its promise as a DRAM main memory replacement, Phase Change Memory (PCM) has high write latencies which can be a serious detriment to its widespread adoption. Apart from slowing down a write request, the consequent high latency can also keep other chips of the same rank, that are not involved in this write, idle for long times. There are several practical considerations that make it difficult to allow subsequent reads and/or writes to be served concurrently from the same chips during the long latency write. This paper proposes and evaluates several novel mechanisms - re-constructing data from error correction bits instead of waiting for chips currently busy to serve a read, rotating word mappings across chips of a PCM rank, and rotating the mapping of error detection/correction bits across these chips - to overlap several reads with an ongoing write (RoW) and even a write with an ongoing write (WoW). The paper also presents the necessary micro-architectural enhancements needed to implement these mechanisms, without significantly changing the current interfaces. The resulting PCM access parallelism (PCMap) system incorporating these enhancements, boosts the intra-rank-level parallelism during such writes from a very low baseline value of 2.4 to an average and maximum values of 4.5 and 7.4, respectively (out of a maximum of 8.0), across a wide spectrum of both multiprogrammed and multithreaded workloads. This boost in parallelism results in an average IPC improvement of 15.6% and 16.7% for the multi-programmed and multi-threaded workloads, respectively.

Original languageEnglish (US)
Title of host publicationProceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages695-706
Number of pages12
ISBN (Electronic)9781467389471
DOIs
StatePublished - Aug 24 2016
Event43rd International Symposium on Computer Architecture, ISCA 2016 - Seoul, Korea, Republic of
Duration: Jun 18 2016Jun 22 2016

Publication series

NameProceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016

Other

Other43rd International Symposium on Computer Architecture, ISCA 2016
CountryKorea, Republic of
CitySeoul
Period6/18/166/22/16

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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    Arjomand, M., Kandemir, M. T., Sivasubramaniam, A., & Das, C. R. (2016). Boosting Access Parallelism to PCM-Based Main Memory. In Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016 (pp. 695-706). [7551433] (Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCA.2016.66