Carrier transport in amorphous SiC/crystalline silicon heterojunctions

A. N. Nazarov, Ya N. Vovk, V. S. Lysenko, V. I. Turchanikov, V. A. Scryshevskii, S. Ashok

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Abstract

Charge carrier transport in chemical vapor-deposited amorphous SiC/p-type crystalline Si heterostructures has been studied over the temperature range 80-400 K, using current-voltage (I-V), current-temperature (I-T), capacitance-voltage (C-V), and capacitance relaxation (C-t) characteristics. These heterojunctions exhibit high breakdown voltages (230 V) and a diode rectification ratio of 103 at ±0.5 V. At low temperatures (80-120 K) the a-SiC behaves like a dielectric, and the interface built-in voltage can be determined from the capacitance-voltage plot. The corresponding low forward bias current flow is limited by variable-range electron hopping conductivity at Fermi level in the a-SiC layer. At increasing temperature and forward bias voltage, an additional hole current component is found with the transport governed by a multistep tunneling hole emission process through the a-SiC/c-Si heterobarrier. At still higher forward bias voltages (>0.8 V), space-charge-limited hole conduction in the presence of traps in the a-SiC bulk limits transport.

Original languageEnglish (US)
Pages (from-to)4422-4428
Number of pages7
JournalJournal of Applied Physics
Volume89
Issue number8
DOIs
StatePublished - Apr 15 2001

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy(all)

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    Nazarov, A. N., Vovk, Y. N., Lysenko, V. S., Turchanikov, V. I., Scryshevskii, V. A., & Ashok, S. (2001). Carrier transport in amorphous SiC/crystalline silicon heterojunctions. Journal of Applied Physics, 89(8), 4422-4428. https://doi.org/10.1063/1.1355698