Circuits for a VLSI-based standalone backpropagation neural network

S. Wolpert, L. A. Lee, J. F. Heisler

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Three circuits are described as an initial step toward implementing an analog VLSI-based backpropagation neural network. One of these circuits is the connectivity matrix for a fully connected five-input perceptron. The second is a summer circuit that immediately computes total backpropagated error. The third is a triggerable processor that optimizes a given synaptic weight with respect to backpropagated error. Performed in hardware, the operations performed by these circuits will take place in parallel, and in real time. As such, they will allow the neural network to converge at a higher speed than software-based counterparts. The circuitry for this network has been implemented in 2-micron CMOS technology, and will form the bases for truly parallel and simultaneous standalone neural networks that operate in real time without intervention from digital computers.

Original languageEnglish (US)
Title of host publicationProceedings of the 18th IEEE Annual Northeast Bioengineering Conference, NEBEC 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages47-48
Number of pages2
ISBN (Electronic)0780309022
DOIs
StatePublished - Jan 1 1992
Event18th IEEE Annual Northeast Bioengineering Conference, NEBEC 1992 - Kingston, United States
Duration: Mar 12 1992Mar 13 1992

Publication series

NameProceedings of the IEEE Annual Northeast Bioengineering Conference, NEBEC
ISSN (Print)1071-121X
ISSN (Electronic)2160-7001

Conference

Conference18th IEEE Annual Northeast Bioengineering Conference, NEBEC 1992
CountryUnited States
CityKingston
Period3/12/923/13/92

All Science Journal Classification (ASJC) codes

  • Bioengineering

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