The proposed CMOS ultrasound transceiver chip will enable the development of portable high resolution, high-frequency ultrasonic imaging systems. The transceiver chip is designed for close-coupled MEMS transducer arrays which operate with a 3.3-V power supply. In addition, a transmit digital beamforming system architecture is supported in this work. A prototype chip containing 16 receive and transmit channels withpreamplifiers, Time-Gain compensation amplifiers, a multiplexed Analog-to-Digital converter with 3 kB of on-chip SRAM, and 50-MHz resolution time delayed excitation pulse generators has been fabricated. By utilizing a shared A/D converter architecture, the number of A/D converter and SRAM is cut down to one, unlike typical digital beamforming systems which need 16 A/D converters for 16 receive channels. The chip was fabricated in a 0.35-μm standard CMOS process. The chip size is 10 mm 2, and its average power consumption in receive mode is approximately 270 mW with a 3.3-V power supply. The transceiver chip specifications and designs are described, as well as measured results of each transceiver component and initial pulse-echo experimental results are presented. Copyright copy; 2009 IEEE.
|Original language||English (US)|
|Number of pages||11|
|Journal||IEEE transactions on biomedical circuits and systems|
|State||Published - Oct 1 2009|
All Science Journal Classification (ASJC) codes
- Biomedical Engineering
- Electrical and Electronic Engineering