Comparative analysis of NBTI effects on low power and high performance flip-flops

K. Ramakrishnan, X. Wu, Vijaykrishnan Narayanan, Y. Xie

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Scopus citations

Abstract

Mitigating the circuit aging effect in digital circuits has become a very important concern for current and future technology nodes. Negative Bias Temperature Instability (NBTI) is one of the most important circuit aging mechanisms, which can incur timing errors. Flip-flops play a vital role as storage elements in pipelined architectures and are prone to effects of aging. NBTI increases the transistor threshold voltage, affecting the performance of the chip. In this paper, we study the effects of NBTI on the timing characteristics of different types of low power and high performance flip-flops. Factors such as input data probability and temperature which affect the degradation rate are also analyzed.

Original languageEnglish (US)
Title of host publication26th IEEE International Conference on Computer Design 2008, ICCD
Pages200-205
Number of pages6
DOIs
StatePublished - Dec 1 2008
Event26th IEEE International Conference on Computer Design 2008, ICCD - Lake Tahoe, CA, United States
Duration: Oct 12 2008Oct 15 2008

Publication series

Name26th IEEE International Conference on Computer Design 2008, ICCD

Other

Other26th IEEE International Conference on Computer Design 2008, ICCD
CountryUnited States
CityLake Tahoe, CA
Period10/12/0810/15/08

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Comparative analysis of NBTI effects on low power and high performance flip-flops'. Together they form a unique fingerprint.

Cite this