Compiler algorithm for optimizing locality in loop nests

Mahmut Kandemir, J. Ramanujam, A. Choudhary

Research output: Chapter in Book/Report/Conference proceedingConference contribution

37 Scopus citations

Abstract

This paper describes an algorithm to optimize cache locality in scientific codes on uniprocessor and multiprocessor machines. A distinctive characteristic of our algorithm is that it considers loop and data layout transformations in a unified framework. We illustrate through examples that our approach is very effective at reducing cache misses and tile-size sensitivity of blocked loop nests; and can optimize nests for which optimization techniques based on loop transformations alone are not successful. An important special case is the one in which data layouts of some arrays are fixed and cannot be changed. We show how our algorithm can handle this case, and demonstrate how it can be used to optimize multiple loop nests.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Supercomputing
PublisherACM
Pages269-276
Number of pages8
StatePublished - 1997
EventProceedings of the 1997 International Conference on Supercomputing - Vienna, Austria
Duration: Jul 7 1997Jul 11 1997

Other

OtherProceedings of the 1997 International Conference on Supercomputing
CityVienna, Austria
Period7/7/977/11/97

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

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    Kandemir, M., Ramanujam, J., & Choudhary, A. (1997). Compiler algorithm for optimizing locality in loop nests. In Proceedings of the International Conference on Supercomputing (pp. 269-276). ACM.