Compiler-directed management of instruction accesses

G. Chen, G. Chen, I. Kayadif, W. Zhang, M. Kandemir, I. Kolcu, U. Sezer

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

We present a compiler-oriented strategy to reduce the memory system energy consumption due to instruction accesses and increase performance by exploiting scratch pad memories. Scratch pad memories (SPMs) are alternatives to conventional cache memories in embedded computing. These small on-chip memories, like caches, provide fast and low-power access to data and instructions; but, they differ from caches in that their contents are managed by software instead of hardware. Our compiler framework keeps the most frequently used instructions in SPM and dynamically changes the contents of the SPM as the (instruction) working set of the application changes.

Original languageEnglish (US)
Title of host publicationProceedings - Euromicro Symposium on Digital System Design, DSD 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages459-462
Number of pages4
ISBN (Electronic)0769520030, 9780769520032
DOIs
StatePublished - Jan 1 2003
EventEuromicro Symposium on Digital System Design, DSD 2003 - Belek-Antalya, Turkey
Duration: Sep 1 2003Sep 6 2003

Publication series

NameProceedings - Euromicro Symposium on Digital System Design, DSD 2003

Other

OtherEuromicro Symposium on Digital System Design, DSD 2003
CountryTurkey
CityBelek-Antalya
Period9/1/039/6/03

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Compiler-directed management of instruction accesses'. Together they form a unique fingerprint.

Cite this