Computing with ferroelectric FETs: Devices, models, systems, and applications

Ahmedullah Aziz, Evelyn T. Breyer, An Chen, Xiaoming Chen, Suman Datta, Sumeet Kumar Gupta, Michael Hoffmann, Xiaobo Sharon Hu, Adrian Ionescu, Matthew Jerry, Thomas Mikolajick, Halid Mulaosmanovic, Kai Ni, Michael Niemier, Ian O'Connor, Atanu Saha, Stefan Slesazeck, Sandeep Krishna Thirumala, Xunzhao Yin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)

Abstract

In this paper, we consider devices, circuits, and systems comprised of transistors with integrated ferroelectrics. Said structures are actively being considered by various semiconductor manufacturers as they can address a large and unique design space. Transistors with integrated ferroelectrics could (i) enable a better switch (i.e., offer steeper subthreshold swings), (ii) are CMOS compatible, (iii) have multiple operating modes (i.e., I-V characteristics can also enable compact, 1-transistor, non-volatile storage elements, as well as analog synaptic behavior), and (iv) have been experimentally demonstrated (i.e., with respect to all of the aforementioned operating modes). These device-level characteristics offer unique opportunities at the circuit, architectural, and system-level, and are considered here from device, circuit/architecture, and foundry-level perspectives.

Original languageEnglish (US)
Title of host publicationProceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1289-1298
Number of pages10
ISBN (Electronic)9783981926316
DOIs
StatePublished - Apr 19 2018
Event2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 - Dresden, Germany
Duration: Mar 19 2018Mar 23 2018

Publication series

NameProceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
Volume2018-January

Other

Other2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
CountryGermany
CityDresden
Period3/19/183/23/18

Fingerprint

Field effect transistors
Ferroelectric materials
Transistors
Networks (circuits)
Nonvolatile storage
Foundries
Switches
Semiconductor materials
Integrated
System model
Semiconductors

All Science Journal Classification (ASJC) codes

  • Safety, Risk, Reliability and Quality
  • Hardware and Architecture
  • Software
  • Information Systems and Management

Cite this

Aziz, A., Breyer, E. T., Chen, A., Chen, X., Datta, S., Gupta, S. K., ... Yin, X. (2018). Computing with ferroelectric FETs: Devices, models, systems, and applications. In Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 (pp. 1289-1298). (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; Vol. 2018-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/DATE.2018.8342213
Aziz, Ahmedullah ; Breyer, Evelyn T. ; Chen, An ; Chen, Xiaoming ; Datta, Suman ; Gupta, Sumeet Kumar ; Hoffmann, Michael ; Hu, Xiaobo Sharon ; Ionescu, Adrian ; Jerry, Matthew ; Mikolajick, Thomas ; Mulaosmanovic, Halid ; Ni, Kai ; Niemier, Michael ; O'Connor, Ian ; Saha, Atanu ; Slesazeck, Stefan ; Thirumala, Sandeep Krishna ; Yin, Xunzhao. / Computing with ferroelectric FETs : Devices, models, systems, and applications. Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 1289-1298 (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018).
@inproceedings{3de803b7b4734345b29ce4758ecdc38f,
title = "Computing with ferroelectric FETs: Devices, models, systems, and applications",
abstract = "In this paper, we consider devices, circuits, and systems comprised of transistors with integrated ferroelectrics. Said structures are actively being considered by various semiconductor manufacturers as they can address a large and unique design space. Transistors with integrated ferroelectrics could (i) enable a better switch (i.e., offer steeper subthreshold swings), (ii) are CMOS compatible, (iii) have multiple operating modes (i.e., I-V characteristics can also enable compact, 1-transistor, non-volatile storage elements, as well as analog synaptic behavior), and (iv) have been experimentally demonstrated (i.e., with respect to all of the aforementioned operating modes). These device-level characteristics offer unique opportunities at the circuit, architectural, and system-level, and are considered here from device, circuit/architecture, and foundry-level perspectives.",
author = "Ahmedullah Aziz and Breyer, {Evelyn T.} and An Chen and Xiaoming Chen and Suman Datta and Gupta, {Sumeet Kumar} and Michael Hoffmann and Hu, {Xiaobo Sharon} and Adrian Ionescu and Matthew Jerry and Thomas Mikolajick and Halid Mulaosmanovic and Kai Ni and Michael Niemier and Ian O'Connor and Atanu Saha and Stefan Slesazeck and Thirumala, {Sandeep Krishna} and Xunzhao Yin",
year = "2018",
month = "4",
day = "19",
doi = "10.23919/DATE.2018.8342213",
language = "English (US)",
series = "Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1289--1298",
booktitle = "Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018",
address = "United States",

}

Aziz, A, Breyer, ET, Chen, A, Chen, X, Datta, S, Gupta, SK, Hoffmann, M, Hu, XS, Ionescu, A, Jerry, M, Mikolajick, T, Mulaosmanovic, H, Ni, K, Niemier, M, O'Connor, I, Saha, A, Slesazeck, S, Thirumala, SK & Yin, X 2018, Computing with ferroelectric FETs: Devices, models, systems, and applications. in Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, vol. 2018-January, Institute of Electrical and Electronics Engineers Inc., pp. 1289-1298, 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, Dresden, Germany, 3/19/18. https://doi.org/10.23919/DATE.2018.8342213

Computing with ferroelectric FETs : Devices, models, systems, and applications. / Aziz, Ahmedullah; Breyer, Evelyn T.; Chen, An; Chen, Xiaoming; Datta, Suman; Gupta, Sumeet Kumar; Hoffmann, Michael; Hu, Xiaobo Sharon; Ionescu, Adrian; Jerry, Matthew; Mikolajick, Thomas; Mulaosmanovic, Halid; Ni, Kai; Niemier, Michael; O'Connor, Ian; Saha, Atanu; Slesazeck, Stefan; Thirumala, Sandeep Krishna; Yin, Xunzhao.

Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1289-1298 (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; Vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Computing with ferroelectric FETs

T2 - Devices, models, systems, and applications

AU - Aziz, Ahmedullah

AU - Breyer, Evelyn T.

AU - Chen, An

AU - Chen, Xiaoming

AU - Datta, Suman

AU - Gupta, Sumeet Kumar

AU - Hoffmann, Michael

AU - Hu, Xiaobo Sharon

AU - Ionescu, Adrian

AU - Jerry, Matthew

AU - Mikolajick, Thomas

AU - Mulaosmanovic, Halid

AU - Ni, Kai

AU - Niemier, Michael

AU - O'Connor, Ian

AU - Saha, Atanu

AU - Slesazeck, Stefan

AU - Thirumala, Sandeep Krishna

AU - Yin, Xunzhao

PY - 2018/4/19

Y1 - 2018/4/19

N2 - In this paper, we consider devices, circuits, and systems comprised of transistors with integrated ferroelectrics. Said structures are actively being considered by various semiconductor manufacturers as they can address a large and unique design space. Transistors with integrated ferroelectrics could (i) enable a better switch (i.e., offer steeper subthreshold swings), (ii) are CMOS compatible, (iii) have multiple operating modes (i.e., I-V characteristics can also enable compact, 1-transistor, non-volatile storage elements, as well as analog synaptic behavior), and (iv) have been experimentally demonstrated (i.e., with respect to all of the aforementioned operating modes). These device-level characteristics offer unique opportunities at the circuit, architectural, and system-level, and are considered here from device, circuit/architecture, and foundry-level perspectives.

AB - In this paper, we consider devices, circuits, and systems comprised of transistors with integrated ferroelectrics. Said structures are actively being considered by various semiconductor manufacturers as they can address a large and unique design space. Transistors with integrated ferroelectrics could (i) enable a better switch (i.e., offer steeper subthreshold swings), (ii) are CMOS compatible, (iii) have multiple operating modes (i.e., I-V characteristics can also enable compact, 1-transistor, non-volatile storage elements, as well as analog synaptic behavior), and (iv) have been experimentally demonstrated (i.e., with respect to all of the aforementioned operating modes). These device-level characteristics offer unique opportunities at the circuit, architectural, and system-level, and are considered here from device, circuit/architecture, and foundry-level perspectives.

UR - http://www.scopus.com/inward/record.url?scp=85048805345&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85048805345&partnerID=8YFLogxK

U2 - 10.23919/DATE.2018.8342213

DO - 10.23919/DATE.2018.8342213

M3 - Conference contribution

AN - SCOPUS:85048805345

T3 - Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018

SP - 1289

EP - 1298

BT - Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Aziz A, Breyer ET, Chen A, Chen X, Datta S, Gupta SK et al. Computing with ferroelectric FETs: Devices, models, systems, and applications. In Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1289-1298. (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018). https://doi.org/10.23919/DATE.2018.8342213