CPM in CMPs: Coordinated power management in chip-multiprocessors

Asit K. Mishra, Shekhar Srikantaiah, Mahmut Kandemir, Chita R. Das

Research output: Chapter in Book/Report/Conference proceedingConference contribution

45 Scopus citations

Abstract

Multiple clock domain architectures have recently been proposed to alleviate the power problem in CMPs by having different frequency/ voltage values assigned to each domain based on workload requirements. However, accurate allocation of power to these voltage/frequency islands based on time varying workload characteristics as well as controlling the power consumption at the provisioned power level is quite non-trivial. Toward this end, we propose a two-tier feedback-based control theoretic solution. Our first-tier consists of a global power manager that allocates power targets to individual islands based on the workload dynamics. The power consumptions of these islands are in turn controlled by a second-tier, consisting of local controllers that regulate island power using dynamic voltage and frequency scaling in response to workload requirements.

Original languageEnglish (US)
Title of host publication2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010
DOIs
StatePublished - Dec 1 2010
Event2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010 - New Orleans, LA, United States
Duration: Nov 13 2010Nov 19 2010

Publication series

Name2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010

Other

Other2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010
CountryUnited States
CityNew Orleans, LA
Period11/13/1011/19/10

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Hardware and Architecture

Fingerprint Dive into the research topics of 'CPM in CMPs: Coordinated power management in chip-multiprocessors'. Together they form a unique fingerprint.

  • Cite this

    Mishra, A. K., Srikantaiah, S., Kandemir, M., & Das, C. R. (2010). CPM in CMPs: Coordinated power management in chip-multiprocessors. In 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010 [5645461] (2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010). https://doi.org/10.1109/SC.2010.15