DECOMPOSER: A synthesizer for systolic systems.

Pao Po Hou, Robert Michael Owens, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

A tool for synthesizing systolic systems is introduced. Given a hierarchical specification of the computations to be performed and hints as to how, this tool generates an analysis of the hardware required to do the computations. The computations are specified as directed acyclic graphs, and the hints provide the temporal and topological relationships of each computation. The systolic system is synthesized by traversing the graph and marking each computation with a processor name and a time stamp. Its output can subsequently be fed to the remaining tools in the tool set to generate a VLSI fabrication description of the systolic system.

Original languageEnglish (US)
Title of host publicationProceedings - Design Automation Conference
PublisherPubl by IEEE
Pages650-653
Number of pages4
ISBN (Print)0818688645
StatePublished - Dec 1 1988

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0146-7123

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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