Degradation of Submicron N-Channel MOSFET Hot Electron Reliability due to Edge Damage from Polysilicon Gate Plasma Etching

Tieer Gu, O. O. Awadelkarim, S. J. Fonash, Y. D. Chan

Research output: Contribution to journalArticlepeer-review

19 Scopus citations

Abstract

The impact of poly-Si gate plasma etching on the hot electron reliability of submicron NMOS transistors has been explored. The results show that the gate oxide and SiO2-Si interface near the drain junction have a susceptibility to hot electron injection that increases with overetch time. We show for the first time that this degradation of hot electron reliability is attributable to the edge type of gate oxide damage resulting from direct plasma exposure during overetch processing. We demonstrate that this type of damage does not scale with channel length and becomes even more important in shorter channel transistors.

Original languageEnglish (US)
Pages (from-to)396-398
Number of pages3
JournalIEEE Electron Device Letters
Volume15
Issue number10
DOIs
StatePublished - Oct 1994

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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