DESIGN OF AN INTEGRATED RNS DIGITAL FILTER MODULE BASED ON SERIAL-BY-MODULUS ARITHMETIC.

W. K. Jenkins, S. F. Lao

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    The use of residue number system (RNS) arithmetic to designing high-speed special-purpose digital hardware that is suitable for VLSI implementation is considered. A processor architecture based on serial-by-modulus (SBM) RNS arithmetic is presented. Although slower in speed, SBM-RNS architectures are conservative in terms of silicon area and provide a mechanism for realizing high-precision signal processors in VLSI circuits of relatively short wordlength.

    Original languageEnglish (US)
    Title of host publicationUnknown Host Publication Title
    PublisherIEEE
    Pages634-637
    Number of pages4
    ISBN (Print)0818608021
    StatePublished - Dec 1 1987

    All Science Journal Classification (ASJC) codes

    • Engineering(all)

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