Abstract
Nonvolatile SRAM (nvSRAM) has emerged as a promising approach to reducing the standby energy consumption by storing the state into an in situ nonvolatile memory element and shutting down the power supply. Existing nvSRAM solutions based on a nonvolatile backup in magnetic tunnel junction and ReRAM, however, are costly in backup and restore energy due to static current. This cost results in a long break-even time (BET) when compared with a lowered voltage standby volatile SRAM. This brief proposes an nvSRAM based on ferroelectric FETs (FeFETs) that are capable of fully avoiding such static current. A simple differential backup and restore circuitry is proposed, achieving sub-fJ/cell total energy per backup and restore operation at the 10-nm node. This leads to hundreds of times BET improvement over existing ReRAM nvSRAM solutions. This nvSRAM also indicates the future FeFET design trends for such memory-logic synergy.
| Original language | English (US) |
|---|---|
| Article number | 7938658 |
| Pages (from-to) | 3037-3040 |
| Number of pages | 4 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 64 |
| Issue number | 7 |
| DOIs | |
| State | Published - Jul 2017 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
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Design of Nonvolatile SRAM with Ferroelectric FETs for Energy-Efficient Backup and Restore. / Li, Xueqing; Ma, Kaisheng; George, Sumitha; Khwa, Win San; Sampson, John; Gupta, Sumeet; Liu, Yongpan; Chang, Meng Fan; Datta, Suman; Narayanan, Vijaykrishnan.
In: IEEE Transactions on Electron Devices, Vol. 64, No. 7, 7938658, 07.2017, p. 3037-3040.Research output: Contribution to journal › Article
TY - JOUR
T1 - Design of Nonvolatile SRAM with Ferroelectric FETs for Energy-Efficient Backup and Restore
AU - Li, Xueqing
AU - Ma, Kaisheng
AU - George, Sumitha
AU - Khwa, Win San
AU - Sampson, John
AU - Gupta, Sumeet
AU - Liu, Yongpan
AU - Chang, Meng Fan
AU - Datta, Suman
AU - Narayanan, Vijaykrishnan
PY - 2017/7
Y1 - 2017/7
N2 - Nonvolatile SRAM (nvSRAM) has emerged as a promising approach to reducing the standby energy consumption by storing the state into an in situ nonvolatile memory element and shutting down the power supply. Existing nvSRAM solutions based on a nonvolatile backup in magnetic tunnel junction and ReRAM, however, are costly in backup and restore energy due to static current. This cost results in a long break-even time (BET) when compared with a lowered voltage standby volatile SRAM. This brief proposes an nvSRAM based on ferroelectric FETs (FeFETs) that are capable of fully avoiding such static current. A simple differential backup and restore circuitry is proposed, achieving sub-fJ/cell total energy per backup and restore operation at the 10-nm node. This leads to hundreds of times BET improvement over existing ReRAM nvSRAM solutions. This nvSRAM also indicates the future FeFET design trends for such memory-logic synergy.
AB - Nonvolatile SRAM (nvSRAM) has emerged as a promising approach to reducing the standby energy consumption by storing the state into an in situ nonvolatile memory element and shutting down the power supply. Existing nvSRAM solutions based on a nonvolatile backup in magnetic tunnel junction and ReRAM, however, are costly in backup and restore energy due to static current. This cost results in a long break-even time (BET) when compared with a lowered voltage standby volatile SRAM. This brief proposes an nvSRAM based on ferroelectric FETs (FeFETs) that are capable of fully avoiding such static current. A simple differential backup and restore circuitry is proposed, achieving sub-fJ/cell total energy per backup and restore operation at the 10-nm node. This leads to hundreds of times BET improvement over existing ReRAM nvSRAM solutions. This nvSRAM also indicates the future FeFET design trends for such memory-logic synergy.
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UR - http://www.scopus.com/inward/citedby.url?scp=85020415836&partnerID=8YFLogxK
U2 - 10.1109/TED.2017.2707664
DO - 10.1109/TED.2017.2707664
M3 - Article
AN - SCOPUS:85020415836
VL - 64
SP - 3037
EP - 3040
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
SN - 0018-9383
IS - 7
M1 - 7938658
ER -