Designing Algorithm for the High Speed TIQ ADC, with Improved Accuracy

Jun Hyuk Park, Soobum Kwon, Kyusun Choi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Differential nonlinearity (DNL) and integral nonlinearity (INL) are two main performance parameters for an analog-to-digital converter (ADC), which determine an ADC's static accuracy. Theoretically, an ideal ADC can be designed, which has zero nonlinearities. However, it is practically impossible due to manufacturing process variations. Although there were an ideal ADC, its real performance would not be ideal due to operating temperature and supply voltage variations when the ADC is deployed in non-ideal environments. With these variations, we present a new designing algorithm that will result in minimal nonlinearity of a flash ADC utilizing the Threshold Inverter Quantization (TIQ) voltage comparator circuits. The new proposed algorithm reduces worst-case nonlinearity of an 8-bit TIQ flash ADC by 77 percent in comparison to previous algorithms over manufacturing process variations. This new designing algorithm was implemented considering the discrete size (count of fins) and was programmed in a TIQ comparator section software package.

Original languageEnglish (US)
Title of host publicationProceedings - 31st IEEE International System on Chip Conference, SOCC 2018
EditorsMircea Stan, Massimo Alioto, Ramalingam Sridhar, Helen Li, Karan Bhatia
PublisherIEEE Computer Society
Pages233-237
Number of pages5
ISBN (Electronic)9781538614907
DOIs
StatePublished - Jan 17 2019
Event31st IEEE International System on Chip Conference, SOCC 2018 - Arlington, United States
Duration: Sep 4 2018Sep 7 2018

Publication series

NameInternational System on Chip Conference
Volume2018-September
ISSN (Print)2164-1676
ISSN (Electronic)2164-1706

Conference

Conference31st IEEE International System on Chip Conference, SOCC 2018
CountryUnited States
CityArlington
Period9/4/189/7/18

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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    Park, J. H., Kwon, S., & Choi, K. (2019). Designing Algorithm for the High Speed TIQ ADC, with Improved Accuracy. In M. Stan, M. Alioto, R. Sridhar, H. Li, & K. Bhatia (Eds.), Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018 (pp. 233-237). [8618498] (International System on Chip Conference; Vol. 2018-September). IEEE Computer Society. https://doi.org/10.1109/SOCC.2018.8618498