Development toward wafer-scale graphene RF electronics

J. S. Moon, D. Curtis, M. Hu, D. Wong, P. M. Campbell, G. Jernigan, J. Tedesco, B. VanMil, R. Myers-Ward, C. Y. Edd, D. K. Gaskill, J. Robinson, M. Fanton, P. Asbeck

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

We will present recent development of graphene FET technology on a wafer scale, including epitaxial graphene growth, device fabrication and characterization. The epitaxial growth of graphene on 2-inch wafers were fabricated via graphitization of Siface SiC(0001) substrates. The sheet electron carrier density of these layers were typically 10-13 cm2 at room temperature and had mobility of ∼ 1500 cm2 V-1 s-1 or higher. Graphene FETs were fabricated with source and drain non-alloyed ohmic metal schemes. Metal gates were used on top of atomic-layer-deposited high-k (Al2O3) gate dielectric layer. DC and RF performance of the world's first epitaxial graphene RF FETs is presented.

Original languageEnglish (US)
Title of host publicationECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications
Pages35-40
Number of pages6
Edition5
DOIs
StatePublished - Dec 1 2009
Event1st International Symposium on Emerging Materials for Post-CMOS Applications - 215th Meeting of the Electrochemical Society - San Francisco, CA, United States
Duration: May 25 2009May 29 2009

Publication series

NameECS Transactions
Number5
Volume19
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

Other1st International Symposium on Emerging Materials for Post-CMOS Applications - 215th Meeting of the Electrochemical Society
CountryUnited States
CitySan Francisco, CA
Period5/25/095/29/09

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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