Development toward wafer-scale graphene RF electronics

J. S. Moon, D. Curtis, M. Hu, D. Wong, P. M. Campbell, G. Jernigan, J. Tedesco, B. VanMil, R. Myers-Ward, C. Y. Edd, D. K. Gaskill, Joshua Alexander Robinson, Mark Andrew Fanton, P. Asbeck

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

We will present recent development of graphene FET technology on a wafer scale, including epitaxial graphene growth, device fabrication and characterization. The epitaxial growth of graphene on 2-inch wafers were fabricated via graphitization of Siface SiC(0001) substrates. The sheet electron carrier density of these layers were typically 10-13 cm2 at room temperature and had mobility of ∼ 1500 cm2 V-1 s-1 or higher. Graphene FETs were fabricated with source and drain non-alloyed ohmic metal schemes. Metal gates were used on top of atomic-layer-deposited high-k (Al2O3) gate dielectric layer. DC and RF performance of the world's first epitaxial graphene RF FETs is presented.

Original languageEnglish (US)
Title of host publicationECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications
Pages35-40
Number of pages6
Volume19
Edition5
DOIs
StatePublished - Dec 1 2009
Event1st International Symposium on Emerging Materials for Post-CMOS Applications - 215th Meeting of the Electrochemical Society - San Francisco, CA, United States
Duration: May 25 2009May 29 2009

Other

Other1st International Symposium on Emerging Materials for Post-CMOS Applications - 215th Meeting of the Electrochemical Society
CountryUnited States
CitySan Francisco, CA
Period5/25/095/29/09

Fingerprint

Graphene
Electronic equipment
Field effect transistors
Graphitization
Gate dielectrics
Metals
Epitaxial growth
Carrier concentration
Fabrication
Electrons
Substrates
Temperature

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Moon, J. S., Curtis, D., Hu, M., Wong, D., Campbell, P. M., Jernigan, G., ... Asbeck, P. (2009). Development toward wafer-scale graphene RF electronics. In ECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications (5 ed., Vol. 19, pp. 35-40) https://doi.org/10.1149/1.3119525
Moon, J. S. ; Curtis, D. ; Hu, M. ; Wong, D. ; Campbell, P. M. ; Jernigan, G. ; Tedesco, J. ; VanMil, B. ; Myers-Ward, R. ; Edd, C. Y. ; Gaskill, D. K. ; Robinson, Joshua Alexander ; Fanton, Mark Andrew ; Asbeck, P. / Development toward wafer-scale graphene RF electronics. ECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications. Vol. 19 5. ed. 2009. pp. 35-40
@inproceedings{6134d4a1ddc54a069ef44fc507995018,
title = "Development toward wafer-scale graphene RF electronics",
abstract = "We will present recent development of graphene FET technology on a wafer scale, including epitaxial graphene growth, device fabrication and characterization. The epitaxial growth of graphene on 2-inch wafers were fabricated via graphitization of Siface SiC(0001) substrates. The sheet electron carrier density of these layers were typically 10-13 cm2 at room temperature and had mobility of ∼ 1500 cm2 V-1 s-1 or higher. Graphene FETs were fabricated with source and drain non-alloyed ohmic metal schemes. Metal gates were used on top of atomic-layer-deposited high-k (Al2O3) gate dielectric layer. DC and RF performance of the world's first epitaxial graphene RF FETs is presented.",
author = "Moon, {J. S.} and D. Curtis and M. Hu and D. Wong and Campbell, {P. M.} and G. Jernigan and J. Tedesco and B. VanMil and R. Myers-Ward and Edd, {C. Y.} and Gaskill, {D. K.} and Robinson, {Joshua Alexander} and Fanton, {Mark Andrew} and P. Asbeck",
year = "2009",
month = "12",
day = "1",
doi = "10.1149/1.3119525",
language = "English (US)",
isbn = "9781566777131",
volume = "19",
pages = "35--40",
booktitle = "ECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications",
edition = "5",

}

Moon, JS, Curtis, D, Hu, M, Wong, D, Campbell, PM, Jernigan, G, Tedesco, J, VanMil, B, Myers-Ward, R, Edd, CY, Gaskill, DK, Robinson, JA, Fanton, MA & Asbeck, P 2009, Development toward wafer-scale graphene RF electronics. in ECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications. 5 edn, vol. 19, pp. 35-40, 1st International Symposium on Emerging Materials for Post-CMOS Applications - 215th Meeting of the Electrochemical Society, San Francisco, CA, United States, 5/25/09. https://doi.org/10.1149/1.3119525

Development toward wafer-scale graphene RF electronics. / Moon, J. S.; Curtis, D.; Hu, M.; Wong, D.; Campbell, P. M.; Jernigan, G.; Tedesco, J.; VanMil, B.; Myers-Ward, R.; Edd, C. Y.; Gaskill, D. K.; Robinson, Joshua Alexander; Fanton, Mark Andrew; Asbeck, P.

ECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications. Vol. 19 5. ed. 2009. p. 35-40.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Development toward wafer-scale graphene RF electronics

AU - Moon, J. S.

AU - Curtis, D.

AU - Hu, M.

AU - Wong, D.

AU - Campbell, P. M.

AU - Jernigan, G.

AU - Tedesco, J.

AU - VanMil, B.

AU - Myers-Ward, R.

AU - Edd, C. Y.

AU - Gaskill, D. K.

AU - Robinson, Joshua Alexander

AU - Fanton, Mark Andrew

AU - Asbeck, P.

PY - 2009/12/1

Y1 - 2009/12/1

N2 - We will present recent development of graphene FET technology on a wafer scale, including epitaxial graphene growth, device fabrication and characterization. The epitaxial growth of graphene on 2-inch wafers were fabricated via graphitization of Siface SiC(0001) substrates. The sheet electron carrier density of these layers were typically 10-13 cm2 at room temperature and had mobility of ∼ 1500 cm2 V-1 s-1 or higher. Graphene FETs were fabricated with source and drain non-alloyed ohmic metal schemes. Metal gates were used on top of atomic-layer-deposited high-k (Al2O3) gate dielectric layer. DC and RF performance of the world's first epitaxial graphene RF FETs is presented.

AB - We will present recent development of graphene FET technology on a wafer scale, including epitaxial graphene growth, device fabrication and characterization. The epitaxial growth of graphene on 2-inch wafers were fabricated via graphitization of Siface SiC(0001) substrates. The sheet electron carrier density of these layers were typically 10-13 cm2 at room temperature and had mobility of ∼ 1500 cm2 V-1 s-1 or higher. Graphene FETs were fabricated with source and drain non-alloyed ohmic metal schemes. Metal gates were used on top of atomic-layer-deposited high-k (Al2O3) gate dielectric layer. DC and RF performance of the world's first epitaxial graphene RF FETs is presented.

UR - http://www.scopus.com/inward/record.url?scp=77149158169&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77149158169&partnerID=8YFLogxK

U2 - 10.1149/1.3119525

DO - 10.1149/1.3119525

M3 - Conference contribution

AN - SCOPUS:77149158169

SN - 9781566777131

VL - 19

SP - 35

EP - 40

BT - ECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications

ER -

Moon JS, Curtis D, Hu M, Wong D, Campbell PM, Jernigan G et al. Development toward wafer-scale graphene RF electronics. In ECS Transactions - Graphene and Emerging Materials for Post-CMOS Applications. 5 ed. Vol. 19. 2009. p. 35-40 https://doi.org/10.1149/1.3119525