Abstract
This paper presents ultra low-power reconfigurable logic and single-electron memory architecture to enable sub-300 mV V CC operation using classical and non-classical (NC) III-V Multi-Gate Quantum Well Field Effect Transistors (MuQFETs). A strained In 0.7Ga 0.3As quantum-well based classical multi-gate FET and an In 0.7Ga 0.3As MuQFET operating in Coulomb-blockade mode with tunable tunnel barrier are experimentally demonstrated. Reconfigurable Binary Decision Diagram (BDD) logic and single-electron SRAM implementations based on III-V MuQFETs are demonstrated. Using device models well calibrated to experiments, we show 50% reduction in minimum-energy for logic, and 75x reduction in dynamic power for memory at equivalent performance over Si CMOS logic.
| Original language | English (US) |
|---|---|
| Title of host publication | 2011 International Electron Devices Meeting, IEDM 2011 |
| DOIs | |
| State | Published - Dec 1 2011 |
| Event | 2011 IEEE International Electron Devices Meeting, IEDM 2011 - Washington, DC, United States Duration: Dec 5 2011 → Dec 7 2011 |
Other
| Other | 2011 IEEE International Electron Devices Meeting, IEDM 2011 |
|---|---|
| Country | United States |
| City | Washington, DC |
| Period | 12/5/11 → 12/7/11 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry
Cite this
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Device circuit co-design using classical and non-classical III-V multi-gate quantum-well FETs (MuQFETs). / Liu, Lu; Saripalli, Vinay; Narayanan, Vijaykrishnan; Datta, Suman.
2011 International Electron Devices Meeting, IEDM 2011. 2011. 6131489.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Device circuit co-design using classical and non-classical III-V multi-gate quantum-well FETs (MuQFETs)
AU - Liu, Lu
AU - Saripalli, Vinay
AU - Narayanan, Vijaykrishnan
AU - Datta, Suman
PY - 2011/12/1
Y1 - 2011/12/1
N2 - This paper presents ultra low-power reconfigurable logic and single-electron memory architecture to enable sub-300 mV V CC operation using classical and non-classical (NC) III-V Multi-Gate Quantum Well Field Effect Transistors (MuQFETs). A strained In 0.7Ga 0.3As quantum-well based classical multi-gate FET and an In 0.7Ga 0.3As MuQFET operating in Coulomb-blockade mode with tunable tunnel barrier are experimentally demonstrated. Reconfigurable Binary Decision Diagram (BDD) logic and single-electron SRAM implementations based on III-V MuQFETs are demonstrated. Using device models well calibrated to experiments, we show 50% reduction in minimum-energy for logic, and 75x reduction in dynamic power for memory at equivalent performance over Si CMOS logic.
AB - This paper presents ultra low-power reconfigurable logic and single-electron memory architecture to enable sub-300 mV V CC operation using classical and non-classical (NC) III-V Multi-Gate Quantum Well Field Effect Transistors (MuQFETs). A strained In 0.7Ga 0.3As quantum-well based classical multi-gate FET and an In 0.7Ga 0.3As MuQFET operating in Coulomb-blockade mode with tunable tunnel barrier are experimentally demonstrated. Reconfigurable Binary Decision Diagram (BDD) logic and single-electron SRAM implementations based on III-V MuQFETs are demonstrated. Using device models well calibrated to experiments, we show 50% reduction in minimum-energy for logic, and 75x reduction in dynamic power for memory at equivalent performance over Si CMOS logic.
UR - http://www.scopus.com/inward/record.url?scp=84863019232&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84863019232&partnerID=8YFLogxK
U2 - 10.1109/IEDM.2011.6131489
DO - 10.1109/IEDM.2011.6131489
M3 - Conference contribution
AN - SCOPUS:84863019232
SN - 9781457705052
BT - 2011 International Electron Devices Meeting, IEDM 2011
ER -