Digital computation in subthreshold region for ultralow-power operation

A device-circuit-architecture codesign perspective

Sumeet Kumar Gupta, Arijit Raychowdhury, Kaushik Roy

Research output: Contribution to journalArticle

53 Citations (Scopus)

Abstract

Ultralow-power dissipation can be achieved by operating digital circuits with scaled supply voltages, albeit with degradation in speed and increased susceptibility to parameter variations. However, operating digital logic and memory circuits in the subthreshold region (supply voltage less than the transistor threshold voltage) for ultralow-power operations requires device, circuit as well as architectural design optimizations, different from the conventional superthreshold design. This paper analyzes such optimizations from energy dissipation point of view and shows that it is feasible to achieve robust operation of ultralow-voltage systems. Operation with power supply as low as 60 mV is demonstrated. Techniques to reduce the impact of process variations on subthreshold circuits are also discussed. In addition, it is shown that subthreshold leakage current can be useful for other applications like thermal sensors.

Original languageEnglish (US)
Article number5395762
Pages (from-to)160-190
Number of pages31
JournalProceedings of the IEEE
Volume98
Issue number2
DOIs
StatePublished - Feb 1 2010

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Networks (circuits)
Energy dissipation
Electric potential
Architectural design
Digital circuits
Threshold voltage
Leakage currents
Transistors
Data storage equipment
Degradation
Sensors
Hot Temperature
Design optimization

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Gupta, Sumeet Kumar ; Raychowdhury, Arijit ; Roy, Kaushik. / Digital computation in subthreshold region for ultralow-power operation : A device-circuit-architecture codesign perspective. In: Proceedings of the IEEE. 2010 ; Vol. 98, No. 2. pp. 160-190.
@article{dd5f1dc8ae4c49babecd62c22251821b,
title = "Digital computation in subthreshold region for ultralow-power operation: A device-circuit-architecture codesign perspective",
abstract = "Ultralow-power dissipation can be achieved by operating digital circuits with scaled supply voltages, albeit with degradation in speed and increased susceptibility to parameter variations. However, operating digital logic and memory circuits in the subthreshold region (supply voltage less than the transistor threshold voltage) for ultralow-power operations requires device, circuit as well as architectural design optimizations, different from the conventional superthreshold design. This paper analyzes such optimizations from energy dissipation point of view and shows that it is feasible to achieve robust operation of ultralow-voltage systems. Operation with power supply as low as 60 mV is demonstrated. Techniques to reduce the impact of process variations on subthreshold circuits are also discussed. In addition, it is shown that subthreshold leakage current can be useful for other applications like thermal sensors.",
author = "Gupta, {Sumeet Kumar} and Arijit Raychowdhury and Kaushik Roy",
year = "2010",
month = "2",
day = "1",
doi = "10.1109/JPROC.2009.2035060",
language = "English (US)",
volume = "98",
pages = "160--190",
journal = "Proceedings of the IEEE",
issn = "0018-9219",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "2",

}

Digital computation in subthreshold region for ultralow-power operation : A device-circuit-architecture codesign perspective. / Gupta, Sumeet Kumar; Raychowdhury, Arijit; Roy, Kaushik.

In: Proceedings of the IEEE, Vol. 98, No. 2, 5395762, 01.02.2010, p. 160-190.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Digital computation in subthreshold region for ultralow-power operation

T2 - A device-circuit-architecture codesign perspective

AU - Gupta, Sumeet Kumar

AU - Raychowdhury, Arijit

AU - Roy, Kaushik

PY - 2010/2/1

Y1 - 2010/2/1

N2 - Ultralow-power dissipation can be achieved by operating digital circuits with scaled supply voltages, albeit with degradation in speed and increased susceptibility to parameter variations. However, operating digital logic and memory circuits in the subthreshold region (supply voltage less than the transistor threshold voltage) for ultralow-power operations requires device, circuit as well as architectural design optimizations, different from the conventional superthreshold design. This paper analyzes such optimizations from energy dissipation point of view and shows that it is feasible to achieve robust operation of ultralow-voltage systems. Operation with power supply as low as 60 mV is demonstrated. Techniques to reduce the impact of process variations on subthreshold circuits are also discussed. In addition, it is shown that subthreshold leakage current can be useful for other applications like thermal sensors.

AB - Ultralow-power dissipation can be achieved by operating digital circuits with scaled supply voltages, albeit with degradation in speed and increased susceptibility to parameter variations. However, operating digital logic and memory circuits in the subthreshold region (supply voltage less than the transistor threshold voltage) for ultralow-power operations requires device, circuit as well as architectural design optimizations, different from the conventional superthreshold design. This paper analyzes such optimizations from energy dissipation point of view and shows that it is feasible to achieve robust operation of ultralow-voltage systems. Operation with power supply as low as 60 mV is demonstrated. Techniques to reduce the impact of process variations on subthreshold circuits are also discussed. In addition, it is shown that subthreshold leakage current can be useful for other applications like thermal sensors.

UR - http://www.scopus.com/inward/record.url?scp=75649123791&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=75649123791&partnerID=8YFLogxK

U2 - 10.1109/JPROC.2009.2035060

DO - 10.1109/JPROC.2009.2035060

M3 - Article

VL - 98

SP - 160

EP - 190

JO - Proceedings of the IEEE

JF - Proceedings of the IEEE

SN - 0018-9219

IS - 2

M1 - 5395762

ER -