Discrete wavelet transforms in VLSI

Mohan Vishwanath, Robert M. Owens, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Scopus citations

Abstract

Three architectures, based on linear systolic arrays, for computing the Discrete Wavelet Transform, are described. The AT2 lower bound for computing the DWT in a systolic model is derived and shown to be AT2 = Ω(N2Nwk). Two of the architectures are within a factor of log N from optimal, but they are of practical importance due to their regular structure, scalability and limited I/O needs. The third architecture is optimal, but it requires complex control.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Application
PublisherPubl by IEEE
Pages218-229
Number of pages12
ISBN (Print)0818629673
StatePublished - Dec 1 1992
EventProceedings of the International Conference on Application Specific Array Processors - Berkeley, CA, USA
Duration: Aug 4 1992Aug 7 1992

Publication series

NameProceedings of the International Conference on Application

Other

OtherProceedings of the International Conference on Application Specific Array Processors
CityBerkeley, CA, USA
Period8/4/928/7/92

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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