Domain wall magnets for embedded memory and hardware security

Anirudh Srikant Iyengar, Swaroop Ghosh, Kenneth Ramclam

Research output: Contribution to journalArticle

14 Scopus citations

Abstract

Domain wall memory (DWM) is one possible candidate for embedded cache application due to its multi-level cell capability, low standby power, fast access time, good endurance, and good retention. In this paper, we utilize a physics-based model of domain wall to comprehend the process variations and Joule heating that can lead to functional issues in the memory. We propose techniques to mitigate the impact of variability and Joule heating while enabling low-power and high-frequency operation. We show that the process variations in the nanowire (NW) is not good towards robustness, but it can be very useful for device authentication. We propose physically unclonable functions (PUFs) that exploit the nonlinear DW-dynamics for secure key generation. Two flavors of PUF designs are described namely relay-PUF and memory-PUF with lower overhead and power as compared to a traditional CMOS-PUFs and offer a higher degree of resilience against cloning.

Original languageEnglish (US)
Article number7036142
Pages (from-to)40-50
Number of pages11
JournalIEEE Journal on Emerging and Selected Topics in Circuits and Systems
Volume5
Issue number1
DOIs
StatePublished - Mar 1 2015

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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