TY - GEN
T1 - Dual mode ferroelectric transistor based non-volatile flip-flops for intermittently-powered systems
AU - Thirumala, S. K.
AU - Raha, A.
AU - Jayakumar, H.
AU - Ma, K.
AU - Narayanan, V.
AU - Raghunathan, V.
AU - Gupta, S. K.
N1 - Publisher Copyright:
© 2018 Association for Computing Machinery.
Copyright:
Copyright 2018 Elsevier B.V., All rights reserved.
PY - 2018/7/23
Y1 - 2018/7/23
N2 - In this work, we propose dual mode ferroelectric transistors (D-FEFETs) that exhibit dynamic tuning of operation between volatile and non-volatile modes with the help of a control signal. We utilize the unique features of D-FEFET to design two variants of non-volatile flip-flops (NVFFs). In both designs, D-FEFETs are operated in the volatile mode for normal operations and in the non-volatile mode to backup the state of the flip-flop during a power outage. The first design comprises of a truly embedded non-volatile element (D-FEFET) which enables a fully automatic backup operation. In the second design, we introduce need-based backup, which lowers energy during normal operation at the cost of area with respect to the first design. Compared to a previously proposed FEFET based NVFF, the first design achieves 19% area reduction along with 96% lower backup energy and 9% lower restore energy, but at 14%-35% larger operation energy. The second design shows 11% lower area, 21% lower backup energy, 16% decrease in backup delay and similar operation energy but with a penalty of 17% and 19% in the restore energy and delay, respectively. System-level analysis of the proposed NVFFs in context of a state-of-the-art intermittently-powered system using real benchmarks yielded 5%-33% energy savings.
AB - In this work, we propose dual mode ferroelectric transistors (D-FEFETs) that exhibit dynamic tuning of operation between volatile and non-volatile modes with the help of a control signal. We utilize the unique features of D-FEFET to design two variants of non-volatile flip-flops (NVFFs). In both designs, D-FEFETs are operated in the volatile mode for normal operations and in the non-volatile mode to backup the state of the flip-flop during a power outage. The first design comprises of a truly embedded non-volatile element (D-FEFET) which enables a fully automatic backup operation. In the second design, we introduce need-based backup, which lowers energy during normal operation at the cost of area with respect to the first design. Compared to a previously proposed FEFET based NVFF, the first design achieves 19% area reduction along with 96% lower backup energy and 9% lower restore energy, but at 14%-35% larger operation energy. The second design shows 11% lower area, 21% lower backup energy, 16% decrease in backup delay and similar operation energy but with a penalty of 17% and 19% in the restore energy and delay, respectively. System-level analysis of the proposed NVFFs in context of a state-of-the-art intermittently-powered system using real benchmarks yielded 5%-33% energy savings.
UR - http://www.scopus.com/inward/record.url?scp=85051510758&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85051510758&partnerID=8YFLogxK
U2 - 10.1145/3218603.3218653
DO - 10.1145/3218603.3218653
M3 - Conference contribution
AN - SCOPUS:85051510758
SN - 9781450357043
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
BT - ISLPED 2018 - Proceedings of the 2018 International Symposium on Low Power Electronics and Design
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 23rd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2018
Y2 - 23 July 2018 through 25 July 2018
ER -