Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM

Yih Wang, Eric Karl, Mesut Meterelliyoz, Fatih Hamzaoglu, Yong Gee Ng, Swaroop Ghosh, Liqiong Wei, Uddalak Bhattacharya, Kevin Zhang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

A novel transient voltage collapse (TVC) technique is presented to enable low-voltage operation in SRAM. By dynamically switching off the PMOS during write operations with a collapsed supply voltage below the data retention voltage, a minimum operating voltage (V ccmin) of 0.6V is demonstrated in a 32nm 12-Mb low-power (LP) SRAM. Data retention failure of unselected cells is mitigated by controlling the duration of voltage collapse. Circuit-process co-optimization is critical to ensure robust circuit design margin of TVC technique.

Original languageEnglish (US)
Title of host publication2011 International Electron Devices Meeting, IEDM 2011
DOIs
StatePublished - Dec 1 2011
Event2011 IEEE International Electron Devices Meeting, IEDM 2011 - Washington, DC, United States
Duration: Dec 5 2011Dec 7 2011

Other

Other2011 IEEE International Electron Devices Meeting, IEDM 2011
CountryUnited States
CityWashington, DC
Period12/5/1112/7/11

Fingerprint

Static random access storage
Electric potential
electric potential
Networks (circuits)
low voltage
margins
optimization
cells

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

Cite this

Wang, Y., Karl, E., Meterelliyoz, M., Hamzaoglu, F., Ng, Y. G., Ghosh, S., ... Zhang, K. (2011). Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM. In 2011 International Electron Devices Meeting, IEDM 2011 [6131655] https://doi.org/10.1109/IEDM.2011.6131655
Wang, Yih ; Karl, Eric ; Meterelliyoz, Mesut ; Hamzaoglu, Fatih ; Ng, Yong Gee ; Ghosh, Swaroop ; Wei, Liqiong ; Bhattacharya, Uddalak ; Zhang, Kevin. / Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM. 2011 International Electron Devices Meeting, IEDM 2011. 2011.
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abstract = "A novel transient voltage collapse (TVC) technique is presented to enable low-voltage operation in SRAM. By dynamically switching off the PMOS during write operations with a collapsed supply voltage below the data retention voltage, a minimum operating voltage (V ccmin) of 0.6V is demonstrated in a 32nm 12-Mb low-power (LP) SRAM. Data retention failure of unselected cells is mitigated by controlling the duration of voltage collapse. Circuit-process co-optimization is critical to ensure robust circuit design margin of TVC technique.",
author = "Yih Wang and Eric Karl and Mesut Meterelliyoz and Fatih Hamzaoglu and Ng, {Yong Gee} and Swaroop Ghosh and Liqiong Wei and Uddalak Bhattacharya and Kevin Zhang",
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Wang, Y, Karl, E, Meterelliyoz, M, Hamzaoglu, F, Ng, YG, Ghosh, S, Wei, L, Bhattacharya, U & Zhang, K 2011, Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM. in 2011 International Electron Devices Meeting, IEDM 2011., 6131655, 2011 IEEE International Electron Devices Meeting, IEDM 2011, Washington, DC, United States, 12/5/11. https://doi.org/10.1109/IEDM.2011.6131655

Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM. / Wang, Yih; Karl, Eric; Meterelliyoz, Mesut; Hamzaoglu, Fatih; Ng, Yong Gee; Ghosh, Swaroop; Wei, Liqiong; Bhattacharya, Uddalak; Zhang, Kevin.

2011 International Electron Devices Meeting, IEDM 2011. 2011. 6131655.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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T1 - Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM

AU - Wang, Yih

AU - Karl, Eric

AU - Meterelliyoz, Mesut

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AU - Ng, Yong Gee

AU - Ghosh, Swaroop

AU - Wei, Liqiong

AU - Bhattacharya, Uddalak

AU - Zhang, Kevin

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N2 - A novel transient voltage collapse (TVC) technique is presented to enable low-voltage operation in SRAM. By dynamically switching off the PMOS during write operations with a collapsed supply voltage below the data retention voltage, a minimum operating voltage (V ccmin) of 0.6V is demonstrated in a 32nm 12-Mb low-power (LP) SRAM. Data retention failure of unselected cells is mitigated by controlling the duration of voltage collapse. Circuit-process co-optimization is critical to ensure robust circuit design margin of TVC technique.

AB - A novel transient voltage collapse (TVC) technique is presented to enable low-voltage operation in SRAM. By dynamically switching off the PMOS during write operations with a collapsed supply voltage below the data retention voltage, a minimum operating voltage (V ccmin) of 0.6V is demonstrated in a 32nm 12-Mb low-power (LP) SRAM. Data retention failure of unselected cells is mitigated by controlling the duration of voltage collapse. Circuit-process co-optimization is critical to ensure robust circuit design margin of TVC technique.

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Wang Y, Karl E, Meterelliyoz M, Hamzaoglu F, Ng YG, Ghosh S et al. Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM. In 2011 International Electron Devices Meeting, IEDM 2011. 2011. 6131655 https://doi.org/10.1109/IEDM.2011.6131655