Dynamic circuit synthesis using the Owens tool set

This paper overviews the Owens CAD tool set developed at Penn State University and illustrates its ability to synthesize dynamic CMOS circuits. The CAD system includes: a cell compiler with transistor sizing and I/O direction annotation; a simulation tool based on the switch-level logic model; tools for multi-level logic optimization; and tools for format conversion which establish a connection with the netlist specification, truth tables, Boolean equations and VHDL. The Owens tool set is able to implement various CMOS structures such as static gates, dynamic gates and transmission gates. In particular, since it supports transistor sizing, it creates an efficient design environment for dynamic circuit implementation and optimization. To show this feature, this paper illustrates the application of the Owens tool set to the design of zipper CMOS adders and manchester carry chain adders which are typical dynamic circuits.