Dynamic management of scratch-pad memory space

M. Kandemir, J. Ramanujam, M. J. Irwin, N. Vijaykrishnan, I. Kadayif, A. Parikh

Research output: Contribution to journalConference article

208 Citations (Scopus)

Abstract

A compiler-controlled on-chip scratch pad memory (SPM) management framework that uses both loop and data transformations was proposed. The issues addressed were determination of memory layouts, best loop access patterns, partition of available space between competing array and restructure of the code for explicit data transfer. These issues werre discussed in the context of SPM and array-based applications which are dominant in video and image processing domains. Significant reductions in data transfer activity between SPM and off-chip memory were exhibited by the experimental results.

Original languageEnglish (US)
Pages (from-to)690-695
Number of pages6
JournalProceedings - Design Automation Conference
StatePublished - Jan 1 2001
Event38th Design Automation Conference - Las Vegas, NV, United States
Duration: Jun 18 2001Jun 22 2001

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Data storage equipment
Data transfer
Image processing

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering

Cite this

Kandemir, M. ; Ramanujam, J. ; Irwin, M. J. ; Vijaykrishnan, N. ; Kadayif, I. ; Parikh, A. / Dynamic management of scratch-pad memory space. In: Proceedings - Design Automation Conference. 2001 ; pp. 690-695.
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Dynamic management of scratch-pad memory space. / Kandemir, M.; Ramanujam, J.; Irwin, M. J.; Vijaykrishnan, N.; Kadayif, I.; Parikh, A.

In: Proceedings - Design Automation Conference, 01.01.2001, p. 690-695.

Research output: Contribution to journalConference article

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AU - Ramanujam, J.

AU - Irwin, M. J.

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AU - Parikh, A.

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