Dynamic on-chip memory management for chip multiprocessors

Mahmut Kandemir, O. Ozturk, M. Karakoy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

One of the most important issues in designing a chip multiprocessor is to decide its on-chip memory organization. A poor on-chip memory design can have serious power and performance implications when running data-intensive embedded applications. While it is possible to design an application-specific memory architecture, this may not be the best option, in particular when storage demands of individual processors and/or their data sharing patterns can change from one point in execution to another for the same application. In this paper, we consider dynamic configuration of software-managed on-chip memory space to adapt runtime variations in data storage demand and interprocessor sharing patterns. The proposed framework is fully implemented using an optimizing compiler, a polyhedral tool, and a memory partitioner (based on integer linear programming), and tested using a suite of eight data-intensive embedded applications. Our experimental evaluation indicates that the proposed technique is very effective in practice and leads to much less energy consumption than all the alternate memory management schemes tested, including one that comes up with an application-specific memory.

Original languageEnglish (US)
Title of host publicationCASES 2004
Subtitle of host publicationInternational Conference on Compilers, Architecture, and Synthesis for Embedded Systems
Pages14-23
Number of pages10
StatePublished - Dec 1 2004
EventCASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems - Washington, DC, United States
Duration: Sep 22 2004Sep 25 2004

Publication series

NameCASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

Other

OtherCASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
CountryUnited States
CityWashington, DC
Period9/22/049/25/04

Fingerprint

Data storage equipment
Memory architecture
Linear programming
Energy utilization

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Kandemir, M., Ozturk, O., & Karakoy, M. (2004). Dynamic on-chip memory management for chip multiprocessors. In CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (pp. 14-23). (CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems).
Kandemir, Mahmut ; Ozturk, O. ; Karakoy, M. / Dynamic on-chip memory management for chip multiprocessors. CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems. 2004. pp. 14-23 (CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems).
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Kandemir, M, Ozturk, O & Karakoy, M 2004, Dynamic on-chip memory management for chip multiprocessors. in CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems. CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pp. 14-23, CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, Washington, DC, United States, 9/22/04.

Dynamic on-chip memory management for chip multiprocessors. / Kandemir, Mahmut; Ozturk, O.; Karakoy, M.

CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems. 2004. p. 14-23 (CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Kandemir M, Ozturk O, Karakoy M. Dynamic on-chip memory management for chip multiprocessors. In CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems. 2004. p. 14-23. (CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems).