Effect of solder thickness on mechanical reliability of die-bonded chip package during chip encapsulation and accelerated thermal cycling

K. Ramakrishna, T. Y. Wu, E. M. Mockensturm

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Mechanical reliability of a solder die bonded chip package during chip encapsulation process and accelerated thermal cycling (ATC) has been evaluated. An electronic package consisting of a solder die bonded chip package used in power supplies is considered. The package has a complex structure with the chip solder die bonded to a thick and stiff substrate. Thermo-mechanical stresses induced during encapsulation processes and ATC stress testing have been computed using a two-dimensional, steady state, non-linear, elasto-plastic finite element (FE) analysis. A parametric study of the effect of solder thickness, in the range 5 to 70 μm (0.2 to 2.8 mils), on die and encapsulant stresses and on solder strain has been carried out for uniform and non-uniform solder bonds. The chip is 5.6 mm square (220 mils) and 0.35 mm thickness (14 mils) chip and the encapsulant thickness is fixed at 1.27 mm (50 mil). Potential for die and encapsulant cracking, and delamination at the die/encapsulant interfaces have been assessed. By combining solder strain during ATC from FE analysis with Coffin-Manson equation, number of cycles to failure of the solder bond have been estimated. Results show that the stresses induced in the die, solder bond, encapsulant and along the die/encapsulant vertical interface increase with decreasing solder thickness. The number of cycles to failure of the solder bond during ATC decreases linearly with decrease in solder thickness. The decrease in fatigue life can be 1-2 orders of magnitude over 5-71 μm range. It is also concluded that solder bond fatigue failure is more of a concern than its failure during chip encapsulation. Non-uniformity of solder thickness marginally decreases fatigue life over the uniform bond of minimum thickness and increases stresses in the chip. Chip cracking is not a concern provided the silicon strength is not unduly diminished to the influence of its manufacturing processes.

Original languageEnglish (US)
Title of host publicationElectronic Packaging Reliability
EditorsLuu T. Nguyen, Michael G. Pecht
PublisherPubl by ASME
Pages13-27
Number of pages15
Volume6
ISBN (Print)0791810356
StatePublished - Dec 1 1993
EventProceedings of the 1993 ASME Winter Annual Meeting - New Orleans, LA, USA
Duration: Nov 28 1993Dec 3 1993

Other

OtherProceedings of the 1993 ASME Winter Annual Meeting
CityNew Orleans, LA, USA
Period11/28/9312/3/93

Fingerprint

Thermal cycling
Encapsulation
Soldering alloys
Fatigue of materials
Finite element method
Delamination

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Mechanical Engineering

Cite this

Ramakrishna, K., Wu, T. Y., & Mockensturm, E. M. (1993). Effect of solder thickness on mechanical reliability of die-bonded chip package during chip encapsulation and accelerated thermal cycling. In L. T. Nguyen, & M. G. Pecht (Eds.), Electronic Packaging Reliability (Vol. 6, pp. 13-27). Publ by ASME.
Ramakrishna, K. ; Wu, T. Y. ; Mockensturm, E. M. / Effect of solder thickness on mechanical reliability of die-bonded chip package during chip encapsulation and accelerated thermal cycling. Electronic Packaging Reliability. editor / Luu T. Nguyen ; Michael G. Pecht. Vol. 6 Publ by ASME, 1993. pp. 13-27
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Ramakrishna, K, Wu, TY & Mockensturm, EM 1993, Effect of solder thickness on mechanical reliability of die-bonded chip package during chip encapsulation and accelerated thermal cycling. in LT Nguyen & MG Pecht (eds), Electronic Packaging Reliability. vol. 6, Publ by ASME, pp. 13-27, Proceedings of the 1993 ASME Winter Annual Meeting, New Orleans, LA, USA, 11/28/93.

Effect of solder thickness on mechanical reliability of die-bonded chip package during chip encapsulation and accelerated thermal cycling. / Ramakrishna, K.; Wu, T. Y.; Mockensturm, E. M.

Electronic Packaging Reliability. ed. / Luu T. Nguyen; Michael G. Pecht. Vol. 6 Publ by ASME, 1993. p. 13-27.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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N2 - Mechanical reliability of a solder die bonded chip package during chip encapsulation process and accelerated thermal cycling (ATC) has been evaluated. An electronic package consisting of a solder die bonded chip package used in power supplies is considered. The package has a complex structure with the chip solder die bonded to a thick and stiff substrate. Thermo-mechanical stresses induced during encapsulation processes and ATC stress testing have been computed using a two-dimensional, steady state, non-linear, elasto-plastic finite element (FE) analysis. A parametric study of the effect of solder thickness, in the range 5 to 70 μm (0.2 to 2.8 mils), on die and encapsulant stresses and on solder strain has been carried out for uniform and non-uniform solder bonds. The chip is 5.6 mm square (220 mils) and 0.35 mm thickness (14 mils) chip and the encapsulant thickness is fixed at 1.27 mm (50 mil). Potential for die and encapsulant cracking, and delamination at the die/encapsulant interfaces have been assessed. By combining solder strain during ATC from FE analysis with Coffin-Manson equation, number of cycles to failure of the solder bond have been estimated. Results show that the stresses induced in the die, solder bond, encapsulant and along the die/encapsulant vertical interface increase with decreasing solder thickness. The number of cycles to failure of the solder bond during ATC decreases linearly with decrease in solder thickness. The decrease in fatigue life can be 1-2 orders of magnitude over 5-71 μm range. It is also concluded that solder bond fatigue failure is more of a concern than its failure during chip encapsulation. Non-uniformity of solder thickness marginally decreases fatigue life over the uniform bond of minimum thickness and increases stresses in the chip. Chip cracking is not a concern provided the silicon strength is not unduly diminished to the influence of its manufacturing processes.

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Ramakrishna K, Wu TY, Mockensturm EM. Effect of solder thickness on mechanical reliability of die-bonded chip package during chip encapsulation and accelerated thermal cycling. In Nguyen LT, Pecht MG, editors, Electronic Packaging Reliability. Vol. 6. Publ by ASME. 1993. p. 13-27