Efficient real-time implementation of MPEG-4 audiovisual decoder using DSP and RISC chips

Byeong Doo Choi, Kang Sun Choi, Sung Jea Ko, Aldo W. Morales

Research output: Contribution to conferencePaper

7 Scopus citations

Abstract

A real-time implementation of MPEG-4 audiovisual decoder using digital signal processing (DSP) and reduced instruction set computing (RISC) chips was presented. MPEG-4 modules were optimized using the seamless double buffering memory structure, the dual MAC applied for half pixel motion compensation (MC), and fast floating-to-integer conversion algorithm. The proposed embedded MPEG-4 implementation is suitable for a mobile multimedia device with power efficiency.

Original languageEnglish (US)
Pages246-247
Number of pages2
StatePublished - Aug 18 2003
Event2003 Digest of Technical Papers: International Conference on Consumer Electronics -
Duration: Jun 17 2003Jun 19 2003

Other

Other2003 Digest of Technical Papers: International Conference on Consumer Electronics
Period6/17/036/19/03

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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    Choi, B. D., Choi, K. S., Ko, S. J., & Morales, A. W. (2003). Efficient real-time implementation of MPEG-4 audiovisual decoder using DSP and RISC chips. 246-247. Paper presented at 2003 Digest of Technical Papers: International Conference on Consumer Electronics, .