An electro-Thermal co-design study has been performed on vertical GaN transistors (oxide, GaN interlayer based vertical trench MOSFETs; OG-FETs). Vertical (GaN-on-GaN) and quasi vertical (GaN-on-sapphire) devices were investigated. Vertical devices showed a 60% lower device peak temperature rise as compared to the quasi-vertical OG-FETs. Using electro-Thermal device simulation, the internal electric field and heat generation distributions within the OG-FETs were analyzed. The temperature rise of a hexagonal honeycomb structured scaled array of OG-FETs was characterized using thermoreflectance thermal imaging and infrared thermography. A 3D thermal model was used to evaluate the impact of design variables including the number of cells, the pitch between individual cells, and the aspect ratio of the array configuration on the self-heating behavior of multi-cell arrays of OG-FETs.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering