TY - JOUR
T1 - Electro-Thermal Investigation of GaN Vertical Trench MOSFETs
AU - Chatterjee, Bikramjit
AU - Ji, Dong
AU - Agarwal, Anchal
AU - Chan, Silvia H.
AU - Chowdhury, Srabanti
AU - Choi, Sukwon
N1 - Funding Information:
Manuscript received January 30, 2021; revised March 2, 2021; accepted March 6, 2021. Date of publication March 10, 2021; date of current version April 26, 2021. This work was supported in part by the Air Force Office of Scientific Research (AFOSR) Young Investigator Program under Grant FA9550-17-1-0141, in part by NSF under Grant CBET-1934482, and in part by Advanced Research Projects Agency-Energy (ARPA-E) SWITCHES. The review of this letter was arranged by Editor R. Quay. (Corresponding author: Sukwon Choi.) Bikramjit Chatterjee and Sukwon Choi are with the Department of Mechanical Engineering, The Pennsylvania State University, University Park, PA 16802 USA (e-mail: sukwon.choi@psu.edu).
Publisher Copyright:
© 1980-2012 IEEE.
PY - 2021/5
Y1 - 2021/5
N2 - An electro-Thermal co-design study has been performed on vertical GaN transistors (oxide, GaN interlayer based vertical trench MOSFETs; OG-FETs). Vertical (GaN-on-GaN) and quasi vertical (GaN-on-sapphire) devices were investigated. Vertical devices showed a 60% lower device peak temperature rise as compared to the quasi-vertical OG-FETs. Using electro-Thermal device simulation, the internal electric field and heat generation distributions within the OG-FETs were analyzed. The temperature rise of a hexagonal honeycomb structured scaled array of OG-FETs was characterized using thermoreflectance thermal imaging and infrared thermography. A 3D thermal model was used to evaluate the impact of design variables including the number of cells, the pitch between individual cells, and the aspect ratio of the array configuration on the self-heating behavior of multi-cell arrays of OG-FETs.
AB - An electro-Thermal co-design study has been performed on vertical GaN transistors (oxide, GaN interlayer based vertical trench MOSFETs; OG-FETs). Vertical (GaN-on-GaN) and quasi vertical (GaN-on-sapphire) devices were investigated. Vertical devices showed a 60% lower device peak temperature rise as compared to the quasi-vertical OG-FETs. Using electro-Thermal device simulation, the internal electric field and heat generation distributions within the OG-FETs were analyzed. The temperature rise of a hexagonal honeycomb structured scaled array of OG-FETs was characterized using thermoreflectance thermal imaging and infrared thermography. A 3D thermal model was used to evaluate the impact of design variables including the number of cells, the pitch between individual cells, and the aspect ratio of the array configuration on the self-heating behavior of multi-cell arrays of OG-FETs.
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U2 - 10.1109/LED.2021.3065362
DO - 10.1109/LED.2021.3065362
M3 - Article
AN - SCOPUS:85102655811
VL - 42
SP - 723
EP - 726
JO - IEEE Electron Device Letters
JF - IEEE Electron Device Letters
SN - 0741-3106
IS - 5
M1 - 9374955
ER -