In this article we report a fully complementary CMOS inverter using multi-layer WSe2 as the channel material in dual gated transistor geometry. We have employed electrostatic doping and contact work function engineering in order to experimentally demonstrate the logic inverter. The maximum inverter gain was found to be ∼12. The noise margin (NM) was ∼ 2.0V. Semiconducting transition metal dichalcogenides (TMDs) like MoS 2, MoSe2, WSe2 and many others are being investigated as potential candidates for beyond Si nanoelectronics owing to their ultra-thin body that allow aggressive channel length scaling (1-4). In this context, it is important to demonstrate simple logic circuits like the inverter with these novel 2D crystals in order to justify their true potential. An inverter should ideally comprise of a PFET and an NFET with similar drive current capabilities. This requires that the channel material should provide easy access to both the electron in the conduction band and holes in the valence band. In Si CMOS this feature is easily achieved through substitutional doping. However, in case of the TMDs, due to the absence of a controllable and sustainable doping scheme, one has to rely on electrostatic doping (adjustment of threshold voltage through gating) and the position of contact Fermi level determined by the work function of the contact metal to enable electron or hole conduction.